Integrated Circuits Inc. aP89042 A PLUS MAKE YOUR PRODUCTION A-PLUS VOICE OTP IC aP89042 – 42sec APLUS INTEGRATED CIRCUITS INC. Address: 3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei, Taiwan 115, R.O.C. (115)台北市南港區成功路一段 32 號 3 樓之 10. Sales E-mail: sales@aplusinc.com.tw TEL: 886-2-2782-9266 FAX: 886-2-2782-9255 Technology E-mail: WEBSITE : http: //www.aplusinc.com.tw Ver 3.0 1 service@aplusinc.com.
Integrated Circuits Inc. aP89042 FEATURES l l l l l l l l l l l l l l l l l l Standard CMOS process. Embedded 1M EPROM. 42 Sec Voice Length at 6 KHz sampling and 4-bit ADPCM compression. Maximum 32 Voice Groups Combination of voice building blocks to extend playback duration. 960 table entries are available for voice block combinations. User selectable PCM or ADPCM data compress. Two triggering modes are available by whole chip option during voice compilation.
Integrated Circuits Inc. aP89042 PIN CONFIGURATIONS S8 1 20 S7 OUT1 2 19 RST VOUT1 3 18 SBT VOUT2 4 17 S4 VSS 5 16 S3 OUT2 6 15 VDD OUT3 7 14 S2 COUT 8 13 S1 OSC 9 12 VPP 10 11 S6 S5 DIP / SOP 300 MIL PIN NAMES PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Ver 3.
Integrated Circuits Inc. aP89042 PIN DESCRIPTIONS S1 ~ S8 Input Trigger Pins: - S1 to S8 is used to trigger the 32 Voice Groups in both Key and CPU Parallel Trigger Mode. - In OTP Programming Mode, S1 to S7 are used as program enable pins. SBT Input Trigger Pin: - In Key Trigger Mode, this pin is trigger pin to trigger the playback of Voice Groups one by one sequentially. - In CPU Parallel Command Mode, this pin is used as address strobe to latch the input from S1 to S5 and starts the voice playback.
Integrated Circuits Inc. aP89042 VOICE SECTION COMBINATIONS Voice files created by the PC base developing system are stored in the built-in EPROM of the aP89042 chip as a number of fixed length Voice Blocks. Voice Blocks are then selected and grouped into Voice Groups for playback. Up to 32 Voice Groups are allowed. A Voice Block Table is used to store the information of combinations of Voice Blocks and then group them together to form Voice Group. Chip aP89042 Memory size 1M bits Max no.
Integrated Circuits Inc. aP89042 Programmable Options In both Key Trigger Mode and CPU Parallel Trigger Mode, user can select different trigger functions and output signals to be sent out from the pins OUT1, OUT2 and OUT3. Options affect all Voice Group playback are called Whole Chip Options. Options only affect the playback of individual Voice Group are called Group Options. Whole Chip Options • Key or CPU Parallel Trigger Mode.
Integrated Circuits Inc. aP89042 Group Options User selectable options that affect each individual group are called Group Options. They are: • Edge or Level trigger • Unholdable or Holdable trigger • Re-triggerable or non-retriggerable • Stop pulse disable or enable Fig. 4 to Fig. 9 show the voice playback with different combination of triggering mode and the relationship between outputs and voice playback. Fig. 4 Level, Unholdable, Non-retriggerable Fig. 5 Level Holdable Fig.
Integrated Circuits Inc. aP89042 Fig. 7 Edge, Unholdable, Non-retrigger Fig. 8 Edge, Holdable Fig. 9 SBT sequential trigger with Edge Holdable and Unholdable Ver 3.
Integrated Circuits Inc. aP89042 Overlap trigger is supported with Level/Unholdable trigger options: Fig. 10 Overlap trigger Ver 3.
Integrated Circuits Inc. aP89042 TRIGGER MODES There are two triggering modes available with aP89042. Key or CPU Trigger modes are determined by setting the EPORM programmable options during voice data compilation. Key Trigger Mode With this trigger mode, up to 32 Voice Groups are triggered by setting S1 to S8 to HIGH or NC (not connected) in different combinations. Each Voice Group can have its only independent trigger options (See Fig. 4, 5, 7 and 8 for trigger options definition).
Integrated Circuits Inc. aP89042 Key Trigger Mode Up to 32 Voice Groups can be triggered by S1 to S8. Voice Group 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Ver 3.
Integrated Circuits Inc. aP89042 CPU Trigger Mode Up to 32 Voice Groups can be triggered by supplying address to [S5:S1] with SBT as strobe signal.
Integrated Circuits Inc. aP89042 BLOCK DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol Rating Unit VDD - VSS -0.5 ~ +4.5 V VIN VSS - 0.3
Integrated Circuits Inc. aP89042 DC CHARACTERISTICS ( TA = 0 to 70℃, VDD = 3.3V, VSS = 0V ) Symbol Parameter Min. Typ. Max. Unit Condition VDD Operating Voltage 2.2 3.0 3.6 V ISB Standby current 1 5 μA I/O open IOP Operating current 15 mA I/O open VIH "H" Input Voltage 2.5 3.0 3.5 V VDD=3.0V VIL "L" Input Voltage -0.3 0 0.5 V VDD=3.0V IOL VOUT low O/P Current 120 mA Vout=0.3V, VDD=3.0V IOH VOUT high O/P Current -120 mA Vout=2.5V, VDD=3.
Integrated Circuits Inc. aP89042 TIMING WAVEFORMS KEY Trigger Mode tKD S1~S8, SBT tSTPD COUT STOP tSTPW BUSY tBH tBD CPU Parallel Mode Addr. S1~S5 SBT tSBTW AC CHARACTERISTICS Symbol Parameter tKD tAH tAS ( TA = 0 to 70℃, VDD = 3.3V, VSS = 0V, 8KHz sampling ) Min. Typ. Max.
Integrated Circuits Inc. aP89042 OSCILLATOR RESISTANCE TABLE Sampling Frequency KHz 4.90 5.26 5.88 6.09 6.33 6.67 6.85 7.14 7.46 7.70 8.06 8.47 8.93 9.26 9.80 10.42 ROSC KOhm ROSC KOhm 140 130 120 110 100 91 82 75 68 62 56 51 43 300 290 280 270 260 250 240 230 220 210 200 190 180 170 160 150 Sampling Frequency KHz 11.00 11.76 12.50 13.33 14.51 15.63 16.95 18.18 19.23 20.83 22.22 23.81 25.00 Note: The data in the above tables are within 3% accuracy and measured at VDD = 3.0V.
Integrated Circuits Inc. aP89042 TYPICAL APPLICATIONS Key Trigger Mode 0.1uF 0.01uF 8Ω Speaker VDD,VPP RST ROSC 390Ω S1 S2 S3 • • 3.3V • • • 8050D COUT OSC VOUT1 VOUT2 • S8 SBT 8 / 16Ω Speaker OUT1 VSS Fig. 12 Using 3.3V Battery HT7335 10uF 0.01uF 8Ω Speaker VDD,VPP ROSC RST 4.5V • • • 8050D COUT OSC S1 S2 S3 • • VOUT1 VOUT2 • S8 SBT 8 / 16Ω Speaker OUT1 VSS Output driving of HT LDO: HT7136 (30mA, 3.6V) HT7133 (30mA, 3.3V) HT7536 (100mA, 3.6V) HT7335 (250mA, 3.5V) Fig.
Integrated Circuits Inc. aP89042 CPU Parallel Mode VIN=+5V VOUT=+3.5V HT7335 10uF 0.01uF ROSC VDD,VPP RST OSC MCU Addr[0] Addr[1] Addr[2] • • • 8050D S1 S2 S3 • • • • • • Addr[4] I[0..2] COUT 8Ω Speaker S5 Rin 3 OUT[1..3] VSS Rin = 860KΩ x (VIN-VOUT) / VIN Fig. 14 5V CPU Control with COUT Ver 3.
Integrated Circuits Inc. aP89042 Bonding Diagram Bonding pad size: 80um x 90um MODE pad MUST be not connected. Pad Name VDD MODE S3 S4 SBT RST S7 S8 OUT1 VOUT1 VOUT2 Ver 3.0 Location (X,Y) 2199.83, 1276.99 1918.34, 1281.99 1652.19, 1281.99 1448.56, 1281.99 1182.62, 1281.99 978.99, 1281.99 713.23, 1281.99 509.60, 1281.99 243.99, 1281.99 173.70, 1014.23 713.70, 614.27 Pad Name VSS OUT2 OUT3 COUT OSC S5 S6 VPP S1 S2 19 Location (X,Y) 173.70, 358.65 173.70, 138.00 439.31, 138.00 642.94, 138.00 1276.
