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Voice Recording & Playback Device

16 Minute Duration

2002/5/10 Page 1

APR6016

Features

•Multi-level analog storage

-High quality audio recording and playback

•Dual mode storage of analog and/or digital data

-Eliminates the need for separate digital memory

•Advanced, non-volatile Flash memory technology

-No battery backup required

•SPI interface

-Allows any commercial microcontroller to control

the device

•Programmable Sampling Clock

-Allows user to choose quality and duration levels

•Single 3V power supply

•Low power consumption

-Playback operating current: 15 mA typical

-Standby current: 1 uA maximum

-Automatic power-down

•Multiple package options available

-CSP, PDIP, Bare Die

•On-board clock prescaler

-Eliminates the need for external clock dividers

•Automatic squelch circuit

Reduces background noise during quiet passages

General Description

The APR6016 offers non-volatile storage of voice and/or data

in advanced Multi-Level Flash memory. Up to 16 minutes of

audio recordin

g and playback can be accommodated. A max-

imum of 30K bits of di

gital data can be stored.

devices can be cascaded for lon

ger duration recording or

greater digital storage. Device control is accomplished

throu

gh an industry standard SPI interface that allows a

microcontroller to mana

ge message recording and playback.

This flexible arran

gement allows for the widest variety of

messa

ging options. The APR6016 is ideal for use in cellular

and cordless phones, telephone answerin

g devices, personal

gital assistants, personal voice recorders, and voice pag-

ers.

APLUS Integrated

achieves this high level of storage capabi-

lity

by usin

g a proprietary analog multi-level storage te

chno

l -

logy

i mplemented in an advanced non-volatile Flash memory

process. Each memory cell can typically store 256 volta

levels. This allows the

APR6008 voice

reproduce audio

gnals in their natural form, eliminating the need for en

co-

ding

and compression which can introduce distortion.

Figure 1 APR6016 Pinout Diagrams

/CS

VSSD

ANAOUT-

ANAOUT+

/RESET

VSSA

AUDOUT

SQLCAP

SCLK

VCCD

EXTCLK

/INT

SAC

VSSA

/BUSY

VCCA

ANAIN+

ANAIN-

/SQLOUT

28 pin DIP

APLUS INTEGRATED CIRCUITS INC.

APR6016

Summary of content (23 pages)

PAGE 1
APLUS INTEGRATED CIRCUITS INC.
PAGE 2
Preliminary APR6016 Data Sheet Functional Description The EXTCLK pin allows the use of an external sampling clock. This input can accept a wide range of frequencies depending on the divider ratio programmed into the divider that follows the clock. Alternatively, the programmable internal oscillator can be used to supply the sampling clock. The Mux following both signals automatically selects the EXTCLK signal if a clock is present, otherwise the internal oscillator source is chosen.
PAGE 3
Preliminary APR6016 Data Sheet Memory Organization SPI Interface The APR6016 memory array is organized to allow the greatest flexibility in message management and digital storage. The smallest addressable memory unit is called a “sector”. The APR6016 contains 1280 sectors. All memory management is handled by an external host processor. The host processor communicates with the APR6016 through a simple Serial Peripheral Interface (SPI) Port.
PAGE 4
Preliminary APR6016 Data Sheet Figure 4 Sending SPI Commands ~~ /CS ~~ ThiSCLK TfCS DI T next1 , T next2 , T next3 , T next4 ~~ SCLK Op4 ~~ TpSCLK Op2 Op3 TloSCLK ~~ Op1 A2 T suDI TrCS ~~ A0 A1 ThDI Figure 5 OpCode Format F irst b it sh ifte d in L a st b it s h ifted in A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 { { O p4 O p3 O p2 O p1 O p0 A14 A13 A12 A11 A10 OpC ode C om m and OpCode Param eter Figure 6 Opcode Stream Timing SCLK /CS DI C urre nt C om m and N ext C om m and
PAGE 5
Preliminary APR6016 Data Sheet Table 1 Sequential Command Timing Current Command NOP Next command Timing Symbol Any Command Tnext1 5u SEC PWRUP Any Command Tnext2 5m SEC STOP_PWDN PWRUP Tnext2 5m SEC SET_REC STOP, STOP_PWDN, SET_REC, REC,NOP Within SAC Low Time SID REC SET_PLAY STOP, STOP_PWDN, SET_FWD, FWD, SET_PLAY,PLAY, NOP PLAY SET_FWD SET_FWD, FWD, STOP, STOP_PWDN FWD DIG_WRITE Any Digital Command, STOP, STOP_PWDN Tnext3 DIG_READ Note: For partial DIG_READ Tnext3 is measured f
PAGE 6
Preliminary APR6016 Data Sheet Instruction Name SET_REC OpCode (5 bits) Opcode Parameters (15bits) [Op4 - Op0] [Address MSB - Address LSB] [Address 14 - Address 0] [01000] Sector Address [A14 - A0] Allowable Follow on Commands Summary STOP, STOP_PWDN, SET_REC, REC,NOP Starts a record operation from the sector address specified. REC [01001] [Don’t care] STOP, STOP_PWDN, SET_REC, REC,NOP Starts a record operation from the current sector address.
PAGE 7
Preliminary APR6016 Data Sheet to N:1 where N is an integer between 1 and 256, excluding 2. The N value should be selected to satisfy the following equation as closely as possible: EXTCLK freq = (N) * (128) * (selected sampling frequency) Example: Suppose that 8.0 KHz sampling is desired. Assume that the frequency of the signal present on EXTCLK = 8MHz. 8000000 N = -------------------------- = 7.
PAGE 8
Preliminary APR6016 Data Sheet Receiving Device Information out three different types of data streams: Device status, Silicon ID, and user stored digital data. Device status and silicon ID are described in the next two sections. Retrieval of user data is described in the Reading Digital Data section. The device communicates data to the user by shifting out data on the DO pin. The device will shift out data according to the timing parameters given in figure 7.
PAGE 9
Preliminary APR6016 Data Sheet Reading the SID OpCode commands; a SID command followed by any other command, usually a NOP command. The device will clock the SID data out on the DO pin as the command that follows the SID command is clocked in. Figure 9 is a diagram that describes the process necessary for reading SID information. Each device in the APR60XX series family contains an embedded Silicon Identification (SID).
PAGE 10
Preliminary APR6016 Data Sheet Writing Digital Data Digital data is written into the device using the DIG_WRITE command. No mixing of analog data and digital data within a sector is possible. Sectors 0 through 9 are tested and guaranteed for digital storage. Other sectors, with the exception of sector 1279, can store data but have not been tested, and are thus not guaranteed to provide 100% good bits. This can be managed with error correction or forward check-beforestore methods.
PAGE 11
Preliminary APR6016 Data Sheet Reading Digital Data Digital data is read from the device using the DIG_READ command. To read data you must send a DIG_READ command immediately followed by 3012 don’t care bits during the same /CS cycle. The data previously stored in the specified sector will begin to appear on the DO pin after the current device status or SID and four buffer bits. The next 3004 bits are the previously stored data. The first bit shifted out is the first bit that was written.
PAGE 12
Preliminary APR6016 Data Sheet Recording Audio Data When a SET_REC or REC command is issued the device will begin sampling and storing the data present on ANAIN+ and ANAIN- to the specified sector. After half the sector is used the SAC pin will drop low to indicate that a new command can be accepted. The device will accept commands as long as the SAC pin remains low. Any command received after the SAC returns high will be queued up and executed during the next SAC cycle.
PAGE 13
Preliminary APR6016 Data Sheet Playing Back Audio Data When a SET_PLAY or PLAY command is issued the device will begin sampling the data in the specified sector and produce a resultant output on the AUDOUT, ANAOUT-, and ANAOUT+ pins. After half the sector is used the SAC pin will drop low to indicate that a new command can be accepted. The device will accept commands as long as the SAC pin remains low. Any command received after the SAC returns high will be queued up and executed during the next SAC cycle.
PAGE 14
Preliminary APR6016 Data Sheet ment needs to be selected, and do so before the SAC signal returns high. Failing to specify the next command before the current segment is exhausted (either during recording or playback) will result in a noticeable gap during playback or recording. The /BUSY pin indicates when the device is performing either a play, record, DIG_WRITE, DIG_READ or fast forward function. The host microprocessor can monitor the busy pin to confirm the status of these commands.
PAGE 15
Preliminary APR6016 Data Sheet Sample Application Figure 15 shows a sample application utilizing a generic microcontroller and SPI interface for message management. speaker. Several vendors supply integrated speaker amplifiers that can be used for this purpose. The microcontroller uses three general purpose inputs for the play, record and skip buttons. Five general purpose I/O signals are utilized in the SPI interface. The /RESET and /BUSY signal are not used in this design.
PAGE 16
Preliminary APR6016 Data Sheet Pin Descriptions Table three shows pin descriptions for the APR6016 device. All pins are listed in numerical order with the exception of VCC, VSS and NC pins which are listed at the end of the table. Table 3 APR6016 28 Pin Number & Description Pin Name Pin No. Pad No. (Die) 28 pin DIP Reference Figure 18 Functionality SAC 24 27 Sector Address Control Output: This active low output indicates when the device is nearing the end of the current segment.
PAGE 17
Preliminary APR6016 Data Sheet Pin Name Pin No. Pin No. Pad No. (Die) 28 pin TSOP 28 pin DIP Reference Figure 18 Functionality ANAIN+ 17 19 Non-Inverting Analog Input: This input is the non-inverting input for the analog signal that the user wishes to record. When the device is used in a differential input configuration this pin should receive a 16 mV peak to peak input coupled through a 0.1 uF capacitor.
PAGE 18
Preliminary APR6016 Data Sheet Table 5 DC Characteristics Item Min Typ Max Unit VCCA VCCD 2.9 3.0 3.3 V Operating Temperature TA 0 Input High Voltage VIH VCC = 2.9V 2.4 3 5.5 V Input Low Voltage VIL VCC = 3.3V VSS - 0.3V 0 .4 V Output High Voltage VOH VCC = 2.7V IOH=-1.6mA VCCD - 0.5V Output Low Voltage VOL VCC = 2.7V IOL=1.0mA Input Leakage Current IIH VCC = 3.3V VIH=VCC Input Leakage Current IIL VCC = 3.3V VIL=VSS Output Tristate Leakage Current IOZ VCC = 3.
PAGE 19
Preliminary APR6016 Data Sheet Item SPI clock high time Clock to rising edge of /CS Symbol Condition Min Typ Max Unit ThiSCLK 400 ns TrCS 200 ns Fall of /CS to DO output TfcsDO 200 ns Fall of SCLK to data out valid TfSCLK 1000 ns Rise of /CS to DO high Z ThzDO 500 ns Period SPI clock for DIG_READ, write First SET_REC command to start recording DTpSCLK @4kHz Internal sample clock @8kHz Internal sample clock External sample clock 500 250 Equation 1 uS uS S Tarec @4kHz Internal
PAGE 20
Preliminary APR6016 Data Sheet Item See Figure 6 and Table 1 Symbol Condition Min Typ Max Unit Tnext4 Previous command = SET_REC, REC, SET_PLAY, PLAY @4kHz Internal sample clock @8kHz Internal sample clock External sample clock 470 235 Equation 7 ms ms S Previous command = SET_FWD, FWD @4kHz Internal sample clock @8kHz Internal sample clock External sample clock 1.25 0.
PAGE 21
Preliminary APR6016 Data Sheet Figure 17 28 pin dual inline package (DIP) PIN NO. 1 SEE NOTE 9 CL OPTIONAL EJECTOR PIN INDENTION SHOWN FOR CONVENTIONAL MOLD ONLY P D Q1 Q2 A E E 1 6°-16° 4 PLCS. BASE PLANE SEATING PLANE aa A1 S B B1 e L C 1 e A NOTES: S Y M B O L INCHES MIN. NOM. MAX. A .190 A1 .015 B .015 .018 .022 B1 .055 .060 .065 C .008 .010 .012 D 1.445 1.450 1.455 E .600 .625 E1 .530 .540 .550 e1 .100 BSC eA .600 BSC L .125 .135 a o 15o 0 a N 28 P .685 Q1 .065 .070 .075 Q2 .
PAGE 22
Preliminary APR6016 Data Sheet Figure 18 Bond Pad Layout and Coordinates X Coordinate 0 O rig in 0 9 A 8 NA 10 /RE S E T O AN UT AO + NC UT 7 NC 6 V S SD 5 - V S SD 4 11 V S S A 12 VS S A DO 3 13 V SS A DI 2 /CS 1 Y Coordinate 14 AUDO UT S CLK 34 15 S QLC AP VC CD 33 V CCD 32 V CCD 31 16 /S Q LO UT E XT CLK 30 /INT 29 17 ANAIN18 ANAIN+ NC 28 19 V CCA 20 V CCA 21 Table 7 NC 22 /B VS Y US Coordinate Information V V SA SS S S SA A A C 23 2 4 25 26 NC 27 Pad Number Pad Na
PAGE 23
•APPLICATION CIRCUIT DIAGRAM •POWER APPLICATION CIRCUIT DIAGRAM Page 23 Voice Recording & Playback Device