Manual

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Features

• Low-voltage Operation

–1.8V (V

= 1.8V to 3.6V)

–2.5V (V

= 2.5V to 5.5V)

• Internally Organized 131,072 x 8

• Two-wire Serial Interface

• Schmitt Triggers, Filtered Inputs for Noise Suppression

• Bidirectional Data Transfer Protocol

• 400 kHz (1.8V) and 1 MHz (5V, 2.5V) Clock Rate

• Write Protect Pin for Hardware and Software Data Protection

• 256-byte Page Write Mode (Partial Page Writes Allowed)

• Random and Sequential Read Modes

• Self-timed Write Cycle (5 ms Typical)

• High Reliability

– Endurance: 1,000,000 Write Cycles/Page

– Data Retention: 40 Years

• 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead TSSOP, 8-lead Ultra Thin

Small Array (SAP), and 8-ball dBGA2 Packages

• Die Sales: Wafer Form, Tape and Reel and Bumped Die

Description

The AT24C1024B provides 1,048,576 bits of serial electrically erasable and program-

mable read only memory (EEPROM) organized as 131,072 words of 8 bits each. The

device’s cascadable feature allows up to four devices to share a common two-wire

bus. The device is optimized for use in many industrial and commercial applications

where low-power and low-voltage operation are essential. The devices are available

in space-saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead TSSOP,

8-ball dBGA2 and 8-lead Ultra Thin SAP packages. In addition, the entire family is

available in 1.8V (1.8V to 3.6V) and 2.5V (2.5V to 5.5V) versions.

Table 1. Pin Configurations

Pin Name Function

A1 Address Input

A2 Address Input

SDA Serial Data

SCL Serial Clock Input

WP Write Protect

NC No Connect

Two-wire Serial

EEPROM

1M (131,072 x 8)

AT24C1024B

with Two Device

Address Inputs

Preliminary

Rev. 5194D–SEEPR–5/07

8-lead PDIP

GND

VCC

SCL

SDA

8-lead TSSOP

VCC

SCL

SDA

GND

8-lead SOIC

GND

VCC

SCL

SDA

8-lead Ultra-Thin SAP

Bottom View

VCC

SCL

SDA

GND

8-lead dBGA2

Bottom View

VCC

SCL

SDA

GND

Summary of content (21 pages)

PAGE 1
Features • Low-voltage Operation • • • • • • • • • • • • – 1.8V (VCC = 1.8V to 3.6V) – 2.5V (VCC = 2.5V to 5.5V) Internally Organized 131,072 x 8 Two-wire Serial Interface Schmitt Triggers, Filtered Inputs for Noise Suppression Bidirectional Data Transfer Protocol 400 kHz (1.8V) and 1 MHz (5V, 2.
PAGE 2
Absolute Maximum Ratings* Operating Temperature..................................–55°C to +125°C Storage Temperature .....................................–65°C to +150°C Voltage on Any Pin with Respect to Ground .................................... –1.0V to +7.0V Maximum Operating Voltage .......................................... 6.25V DC Output Current........................................................ 5.
PAGE 3
AT24C1024B [Preliminary] Pin Description SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device. SERIAL DATA (SDA): The SDA pin is bi-directional for serial data transfer. This pin is opendrain driven and may be wire-ORed with any number of other open-drain or open-collector devices.
PAGE 4
Table 2. Pin Capacitance(1) Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +1.8V Symbol Test Condition CI/O Input/Output Capacitance (SDA) CIN Note: Max Units Conditions 8 pF VI/O = 0V 6 pF VIN = 0V Input Capacitance (A1, SCL) 1. This parameter is characterized and is not 100% tested. Table 3. DC Characteristics Applicable over recommended operating range from: TAI = –40°C to +85°C, VCC = +1.8V to +5.
PAGE 5
AT24C1024B [Preliminary] Table 4. AC Characteristics (Industrial Temperature) Applicable over recommended operating range from TAI = −40°C to +85°C, VCC = +1.8V to +3.6V, CL = 100 pF (unless otherwise noted). Test conditions are listed in Note 2. 1.8-volt Min 2.5, 5.0-volt Symbol Parameter fSCL Clock Frequency, SCL tLOW Clock Pulse Width Low 1.3 0.4 µs tHIGH Clock Pulse Width High 0.6 0.4 µs ti Noise Suppression Time(1) tAA Clock Low to Data Out Valid 0.
PAGE 6
Device Operation CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only during SCL low time periods (see Figure 4 on page 7). Data changes during SCL high periods will indicate a start or stop condition as defined below. START CONDITION: A high-to-low transition of SDA with SCL high is a start condition which must precede any other command (see Figure 5 on page 7).
PAGE 7
AT24C1024B [Preliminary] Figure 3. Write Cycle Timing (SCL: Serial Clock, SDA: Serial Data I/O) SCL SDA 8th BIT ACK WORDn (1) twr STOP CONDITION Note: START CONDITION 1. The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle. Figure 4. Data Validity Figure 5.
PAGE 8
Figure 6. Output Acknowledge Device Addressing The 1024K EEPROM requires an 8-bit device address word following a start condition to enable the chip for a read or write operation (see Figure 7 on page 11). The device address word consists of a mandatory one, zero sequence for the first four most significant bits as shown. This is common to all two-wire EEPROM devices. The 1024K uses the two device address bit, A1, A2, to allow up to four devices on the same bus.
PAGE 9
AT24C1024B [Preliminary] PAGE WRITE: The 1024K EEPROM is capable of 256-byte page writes. A page write is initiated the same way as a byte write, but the microcontroller does not send a stop condition after the first data word is clocked in. Instead, after the EEPROM acknowledges receipt of the first data word, the microcontroller can transmit up to 255 more data words. The EEPROM will respond with a zero after each data word received.
PAGE 10
Read Operations Read operations are initiated the same way as write operations with the exception that the read/write select bit in the device address word is set to one. There are three read operations: current address read, random address read and sequential read. CURRENT ADDRESS READ: The internal data word address counter maintains the last address accessed during the last read or write operation, incremented by one. This address stays valid between operations as long as the chip power is maintained.
PAGE 11
AT24C1024B [Preliminary] Figure 7. Device Address A2 0 Figure 8. Byte Write MOST SIGNIFICANT LEAST SIGNIFICANT P 0 Figure 9. Page Write MOST SIGNIFICANT LEAST SIGNIFICANT P 0 Figure 10.
PAGE 12
Figure 11. Random Read High Byte ADDRESS Low Byte ADDRESS P 0 Figure 12.
PAGE 13
AT24C1024B [Preliminary] Ordering Information Ordering Code Voltage AT24C1024B-PU (Bulk form only) 1.8 8P3 AT24C1024B-PU25 (Bulk form only) 2.5 8P3 (1) Package (NiPdAu Lead Finish) 1.8 8S1 AT24C1024BN-SH-T(2) (NiPdAu Lead Finish) 1.8 8S1 AT24C1024BN-SH25-B(1) (NiPdAu Lead Finish) 2.5 8S1 2.5 8S1 AT24C1024BN-SH-B (2) AT24C1024BN-SH25-T (1) (NiPdAu Lead Finish) (NiPdAu Lead Finish) 1.8 8S2 AT24C1024BW-SH-T(2) (NiPdAu Lead Finish) 1.
PAGE 14
Packaging Information 8P3 – PDIP E 1 E1 N Top View c eA End View COMMON DIMENSIONS (Unit of Measure = inches) D e D1 A2 A SYMBOL A b2 L b3 b 4 PLCS Side View NOM MAX NOTE – – 0.210 2 A2 0.115 0.130 0.195 b 0.014 0.018 0.022 5 b2 0.045 0.060 0.070 6 b3 0.030 0.039 0.045 6 c 0.008 0.010 0.014 D 0.355 0.365 0.400 3 D1 0.005 – – 3 E 0.300 0.310 0.325 4 E1 0.240 0.250 0.280 3 e 0.100 BSC eA 0.300 BSC L Notes: MIN 0.115 0.130 4 0.
PAGE 15
AT24C1024B [Preliminary] 8S1 - JEDEC SOIC C 1 E E1 L N Ø TOP VIEW END VIEW e b COMMON DIMENSIONS (Unit of Measure = mm) A A1 D SIDE VIEW SYMBOL MIN NOM MAX A 1.35 – 1.75 A1 0.10 – 0.25 b 0.31 – 0.51 C 0.17 – 0.25 D 4.80 – 5.05 E1 3.81 – 3.99 E 5.79 – 6.20 e NOTE 1.27 BSC L 0.40 – 1.27 θ 0˚ – 8˚ Note: These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc.
PAGE 16
8S2 – EIAJ SOIC C 1 E E1 L N q TOP VIEW END VIEW e b COMMON DIMENSIONS (Unit of Measure = mm) A SYMBOL A1 D SIDE VIEW NOM MAX NOTE 1.70 2.16 A1 0.05 0.25 b 0.35 0.48 5 C 0.15 0.35 5 D 5.13 5.35 E1 5.18 5.40 E 7.70 8.26 L 0.51 0.85 q 0° 8° e Notes: 1. 2. 3. 4. 5. MIN A 2, 3 1.27 BSC 4 This drawing is for general information only; refer to EIAJ Drawing EDR-7320 for additional information. Mismatch of the upper and lower dies and resin burrs aren't included.
PAGE 17
AT24C1024B [Preliminary] 8A2 - TSSOP 3 2 1 Pin 1 indicator this corner E1 E L1 N L Top View End View COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL A b D MIN NOM MAX NOTE 2.90 3.00 3.10 2, 5 3, 5 E e D A2 6.40 BSC E1 4.30 4.40 4.50 A – – 1.20 A2 0.80 1.00 1.05 b 0.19 – 0.30 e Side View L 0.65 BSC 0.45 L1 Notes: 4 0.60 0.75 1.00 REF 1. This drawing is for general information only.
PAGE 18
8U4-1 - dBGA2 D A1 BALL PAD CORNER 5. b E A1 TOP VIEW A2 A1 BALL PAD CORNER 2 A SIDE VIEW 1 A B e C D (e1) d (d1) BOTTOM VIEW COMMON DIMENSIONS (Unit of Measure = mm) 8 SOLDER BALLS SYMBOL A A1 A2 b D E e e1 d 5. Dimension 'b' is measured at the maximum solder ball diameter. d1 MIN 0.81 0.15 0.40 0.25 NOM MAX NOTE 0.91 1.00 0.20 0.25 0.45 0.50 0.30 0.35 2.47 BSC 4.07 BSC 0.75 BSC 0.74 REF 0.75 BSC 0.80 REF This drawing is for general information only. 1/5/05 TITLE R 18 1150 E.
PAGE 19
AT24C1024B [Preliminary] 8Y7 – SAP PIN 1 INDEX AREA A D1 PIN 1 ID D E1 L A1 E e b e1 A COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX A – – 0.60 A1 0.00 – 0.05 D 5.80 6.00 6.20 E 4.70 4.90 5.10 D1 3.30 3.40 3.50 E1 3.90 4.00 4.10 b 0.35 0.40 0.45 e 1.27 TYP e1 3.81 REF L 0.50 0.60 NOTE 0.70 10/13/05 R 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 TITLE 8Y7, 8-lead (6.00 x 4.
PAGE 20
Revision History 20 Doc. No. Date Comments 5194D 5/2007 Changed ‘Advance Information’ to ‘Preliminary’ 5194C 4/2007 Reduced Pin Configuration sizes Changed Maximum Operating Voltage from 6.0 to 6.25 Removed Device Power Up & Power Down Recommendation Added A2 bit to Device Addressing Removed LSB from Figure 10 Current Address Read Removed reference to Waffle Pack Modified Ordering Code table lines Global change on Voltage from 3.6 to 5.
PAGE 21
Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel: (41) 26-426-5555 Fax: (41) 26-426-5500 Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369 Japan 9F, Tonetsu Shinkawa Bldg.