Manual

AT25DQ161 [DATASHEET]

8671C–DFLASH–11/2012

11.5 Write Configuration Register

The Write Configuration Register command is used to modify the QE bit of the non-volatile Configuration Register.

Before the Write Configuration Register command can be issued, the Write Enable command must have been previously

issued to set the WEL bit in the Status Register to a Logical 1.

To issue the Write Configuration Register command, the

CS pin must first be asserted and the opcode of 3Eh must be

clocked into the device followed by one byte of data. The one byte of data consists of the QE bit value and seven don’t

care bits (Table 11-6). Any additional data clocked into the device will be ignored. When the

CS pin is deasserted, the

QE bit of the Configuration Register will be modified within a time of t

WRCR

, and the WEL bit in the Status Register will be

reset back to a Logical 0.

The complete one byte of data must be clocked into the device before the

CS pin is deasserted, and the CS pin must be

deasserted on byte boundaries (multiples of eight bits); otherwise, the device will abort the operation, the value of the

Configuration Register will not change, and the WEL bit in the Status Register will be reset back to the Logical 0 state.

The Configuration Register is a non-volatile register and is subject to the same program/erase endurance characteristics

of the main memory array.

Table 11-6. Write Configuration Register Format

Figure 11-5. Write Configuration Register

Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

QE X X X X X X X

SCK

MSB

2310

0011111

6754

Opcode

10 119814151312

MSB

DXXXXXXX

Configuration

High-impedance