Manual

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4-Megabit

(512K x 8)

OTP EPROM

AT27C040

Features

•

Fast Read Access Time - 70 ns

•

Low Power CMOS Operation

–100

µA max. Standby

– 30 mA max. Active at 5 MHz

•

JEDEC Standard Packages

– 32-Lead 600-mil PDIP

– 32-Lead 450-mil SOIC (SOP)

– 32-Lead PLCC

– 32-Lead TSOP

•

10% Supply

•

High Reliability CMOS Technology

– 2000V ESD Protection

– 200 mA Latchup Immunity

•

Rapid™ Programming Algorithm - 100 µs/byte (typical)

•

CMOS and TTL Compatible Inputs and Outputs

•

Integrated Product Identification Code

•

Commercial and Industrial Temperature Ranges

Description

The AT27C040 chip is a low-power, high-performance, 4,194,304-bit one-time pro-

grammable read only memory (OTP EPROM) organized as 512K by 8 bits. The

AT27C040 requires only one 5V power supply in normal read mode operation. Any

byte can be accessed in less than 70 ns, eliminating the need for speed reducing

WAIT states on high-performance microprocessor systems.

Rev. 0189E–07/97

Pin Configurations

Pin Name Function

A0 - A18 Addresses

O0 - O7 Outputs

Chip Enable

Output Enable

PDIP, SOIC Top View

VPP

A16

A15

A12

GND

VCC

A18

A17

A14

A13

A11

A10

TSOP Top View

A11

A13

A14

A17

A18

VCC

VPP

A16

A15

A12

A10

GND

PLCC Top View

A14

A13

A11

A10

GND

A12

A15

A16

VPP

VCC

A18

A17

(continued)

Summary of content (12 pages)

PAGE 1
Features • Fast Read Access Time - 70 ns • Low Power CMOS Operation • • • • • • • – 100 µA max. Standby – 30 mA max.
PAGE 2
Atmel’s scaled CMOS technology provides low active power consumption, and fast programming. Power consumption is typically 8 mA in active mode and less than 10 µA in standby mode. The AT27C040 is available in a choice of industry standard JEDEC-approved one-time programmable (OTP) plastic PDIP, PLCC, SOIC (SOP), and TSOP packages. The device features two-line control (CE, OE) to eliminate bus contention in high-speed systems.
PAGE 3
AT27C040 Operating Modes Mode/Pin CE OE Ai Read VIL VIL Ai X(1) Output Disable X VIH X X High Z VIH X X X High Z VIL VIH Ai VPP DIN PGM Verify X VIL Ai VPP DOUT PGM Inhibit VIH VIH X VPP High Z X Identification Code Standby Rapid Program (2) Product Identification(4) Notes: VPP Outputs DOUT VH(3) VIL VIL A9 = A0 = VIH or VIL A1 - A18 = VIL 1. X can be VIL or VIH. 2. Refer to Programming Characteristics 3. VH = 12.0 ± 0.5V. 4.
PAGE 4
DC and AC Operating Conditions for Read Operation AT27C040-70 AT27C040-90 AT27C040-12 AT27C040-15 0°C - 70°C 0°C - 70°C 0°C - 70°C 0°C - 70°C -40°C - 85°C -40°C - 85°C -40°C - 85°C -40°C - 85°C 5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10% Com. Operating Temperature (Case) Ind.
PAGE 5
AT27C040 AC Waveforms for Read Operation(1) Notes: 1. Tiiming measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified. 2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE. 3. OE may be delayed up to tACC - tOE after the address is valid without impact on tACC. 4. This parameter is only sampled and is not 100% tested. 5. Output float is defined as the point when data is no longer driven.
PAGE 6
Programming Waveforms(1) Notes: 1. The Input Timing Reference is 0.8V for VIL and 2.0V for VIH. 2. tOE and tDFP are characteristics of the device but must be accommodated by the programmer. 3. When programming the AT27C040 a 0.1 µF capacitor is required across VPP and ground to supress spurious voltage transients. DC Programming Characteristics TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.
PAGE 7
AT27C040 AC Programming Characteristics TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V Limits Symbol Parameter Test Conditions tAS Address Setup Time tOES OE Setup Time Data Setup Time tAH Address Hold Time Input Pulse Levels: tDH Data Hold Time tDFP OE High to Output Float Delay(2) tVPS VPP Setup Time tVCS VCC Setup Time CE Program Pulse Width tPRT VPP Pulse Rise Time During Programming µs 2 µs 2 µs 0 µs 2 µs 130 ns 2 µs 2 µs 95 Output Timing Reference Level: 0.
PAGE 8
Rapid Programming Algorithm A 100 µs CE pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and VPP is raised to 13.0V. Each address is first programmed with one 100 µs CE pulse without verification. Then a verification/reprogramming loop is executed for each address. In the event a byte fails to pass verification, up to 10 successive 100 µs pulses are applied with a verification after each 8 AT27C040 pulse.
PAGE 9
AT27C040 Ordering Information ICC (mA) tACC (ns) Active Standby Ordering Code Package 70 30 0.1 AT27C040-70JC AT27C040-70PC AT27C040-70RC AT27C040-70TC 32J 32P6 32R 32T Commercial (0°C to 70°C) 30 0.1 AT27C040-70JI AT27C040-70PI AT27C040-70RI AT27C040-70TI 32J 32P6 32R 32T Industrial (-40°C to 85°C) 30 0.1 AT27C040-90JC AT27C040-90PC AT27C040-90RC AT27C040-90TC 32J 32P6 32R 32T Commercial (0°C to 70°C) 30 0.
PAGE 10
Packaging Information 32J, 32-Lead, Plastic J-Leaded Chip Carrier (PLCC) Dimensions in Inches and (Millimeters) JEDEC STANDARD MS-016 AE .045(1.14) X 45˚ PIN NO. 1 IDENTIFY .025(.635) X 30˚ - 45˚ .012(.305) .008(.203) .553(14.0) .547(13.9) .595(15.1) .585(14.9) .032(.813) .026(.660) .050(1.27) TYP 32P6, 32-Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP) Dimensions in Inches and (Millimeters) .300(7.62) REF .430(10.9) .390(9.90) AT CONTACT POINTS 1.67(42.4) 1.64(41.7) PIN 1 .530(13.5) .
PAGE 11
AT27C040 11
PAGE 12
Atmel Headquarters Atmel Operations Corporate Headquarters Atmel Colorado Springs 2325 Orchard Parkway San Jose, CA 95131 TEL (408) 441-0311 FAX (408) 487-2600 Europe 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 TEL (719) 576-3300 FAX (719) 540-1759 Atmel Rousset Atmel U.K., Ltd.