User guide

1
Features
Fast Read Access Time – 150 ns
Automatic Page Write Operation
Internal Address and Data Latches for 64 Bytes
Internal Control Timer
Fast Write Cycle Times
Page Write Cycle Time: 3 ms or 10 ms Maximum
1 to 64-byte Page Write Operation
Low Power Dissipation
50 mA Active Current
200 µA CMOS Standby Current
Hardware and Software Data Protection
DATA Polling for End of Write Detection
High Reliability CMOS Technology
Endurance: 10
4
or 10
5
Cycles
Data Retention: 10 Years
Single 5V ± 10% Supply
CMOS and TTL Compatible Inputs and Outputs
JEDEC Approved Byte-wide Pinout
Full Military, Commercial, and Industrial Temperature Ranges
Description
The AT28C256 is a high-performance electrically erasable and programmable read
only memory. Its 256K of memory is organized as 32,768 words by 8 bits. Manufac-
tured with Atmels advanced nonvolatile CMOS technology, the device offers access
times to 150 ns with power dissipation of just 440 mW. When the device is deselected,
the CMOS standby current is less than 200 µA.
256K (32K x 8)
Paged Parallel
EEPROM
AT28C256
Rev. 0006H12/99
Pin Configurations
Pin Name Function
A0 - A14 Addresses
CE
Chip Enable
OE
Output Enable
WE
Write Enable
I/O0 - I/O7 Data Inputs/Outputs
NC No Connect
DC Dont Connect
CERDIP, PDIP, FLATPACK,
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1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
VCC
WE
A13
A8
A9
A11
OE
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
TSOP
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1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
OE
A11
A9
A8
A13
WE
VCC
A14
A12
A7
A6
A5
A4
A3
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
LCC, PLCC
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Note: PLCC package pins 1 and
17 are DONT CONNECT.
5
6
7
8
9
10
11
12
13
29
28
27
26
25
24
23
22
21
A6
A5
A4
A3
A2
A1
A0
NC
I/O0
A8
A9
A11
NC
OE
A10
CE
I/O7
I/O6
4
3
2
1
32
31
30
14
15
16
17
18
19
20
I/O1
I/O2
GND
DC
I/O3
I/O4
I/O5
A7
A12
A14
DC
VCC
WE
A13
(continued)
PGA
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Summary of content (18 pages)