User Manual
AT75C220
41
MAC Transmit Status Register
Register Name: ETH_TSR
Access Type: Read/write
Reset Value: 0x18
• OVR
Ethernet transmit buffer overrun. Software wrote to the address register or length register when bit 4 was not set.
Cleared by writing a one to this bit.
• COL
Collision occurred. Set by the assertion of collision. Cleared by writing a one to this bit.
• RLE
Retry limit exceeded. Cleared by writing a one to this bit.
• IDLE
Transmitter Idle. Asserted when the transmitter has no frame to transmit. Will be cleared when a length is written to
transmit frame length portion of the Transmit Control register. This bit is read-only.
• BNQ
Ethernet transmit buffer not queued. Software may write a new buffer address and length to the transmit DMA control-
ler. Cleared by having one frame ready to transmit and another in the process of being transmitted. This bit is read-
only.
• COMP
Transmit complete. Set when a frame has been transmitted. Cleared by writing a one to this bit.
• UND
Transmit underrun. Set when transmit DMA was not able to read data from memory in time. If this happens, the trans-
mitter will force bad CRC. Cleared by writing a one to this bit.
31 30 29 28 27 26 25 24
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23 22 21 20 19 18 17 16
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15 14 13 12 11 10 9 8
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76543210
– UND COMP BNQ IDLE RLE COL OVR










