User Manual

AT75C220
75
Note: After a hardware reset, the USART SC and modem pins are not enabled by default (see “PIO: Programmable I/O Controller” on
page 63).
Baud Rate Generator
The baud rate generator provides the bit period clock (the
baud rate clock) to both the receiver and the transmitter.
The baud rate generator can select between external and
internal clock sources. The external clock source is SCK.
The internal clock sources can be either the master clock
ACLK or the master clock divided by 8 (ACLK/8).
Note: In all cases, if an external clock is used, the duration of
each of its levels must be longer than the system clock
(ACLK) period. The external clock frequency must be at
least 2.5 times lower than the system clock.
When the USART is programmed to operate in asynchro-
nous mode (SYNC = 0 in the Mode Register US_MR), the
selected clock is divided by 16 times the value (CD) written
in US_BRGR (Baud Rate Generator Register). If
US_BRGR is set to 0, the baud rate clock is disabled.
When the USART is programmed to operate in synchro-
nous mode (SYNC = 1) and the selected clock is internal
(USCLKS[1] = 0 in the Mode Register US_MR), the baud
rate clock is the internal selected clock divided by the value
written in US_BRGR. If US_BRGR is set to 0, the baud rate
clock is disabled.
In synchronous mode with external clock selected
(USCLKS[1] = 1), the clock is provided directly by the sig-
nal on the SCK pin. No division is active. The value written
in US_BRGR has no effect.
NRTS Request to Send Output
NCTS Clear to Send Input
NDTR Data Terminal Ready Output
NDSR Data Set Ready Input
NDCD Data Carrier Detect Input
NRI Ring Indicator Input
Table 22. USART External Signals
Signal Name Description Type
Baud Rate
=
Selected Clock
16 x CD
Baud Rate
=
Selected Clock
CD
Table 23. Clock Generator Table
Required Baud Rate
(bps)
CD = 24 x 10
6
/
16 x baud rate Actual CD Actual Baud Rate (bps) Error (bps) % Error
9600 156.25 156 9615.4 15.4 0.16
19200 78.125 78 19230.8 30.8 0.16