User Manual

AT89S53
14
Figure 5. Timer 2 in Clock-Out Mode
Figure 6. SPI Block Diagram
OSCILLATOR
8/16-BIT SHIFT REGISTER
READ DATA BUFFER
PIN CONTROL LOGIC
SPI CONTROL
SPI STATUS REGISTER
SPI INTERRUPT
REQUEST
INTERNAL
DATA B U S
SELECT
SPI CLOCK (MASTER)
DIVIDER
÷4÷16÷64÷128
SPI CONTROL REGISTER
8
8
8
SPIF
WCOL
SPR1
MSTR
SPIE
CLOCK
LOGIC
CLOCK
MSB
S
M
SPE
DORD MSTR CPOL CPHA SPR1 SPR0
MSTR SPE DORD
LSB
S
M
M
S
MISO
P1.6
MOSI
P1.5
SCK
1.7
SS
P1.4
SPR0
SPE