Manual
Table Of Contents
- Features
- Description
- Architectural Overview
- General-purpose Register File
- ALU – Arithmetic Logic Unit
- In-System Programmable Flash Program Memory
- EEPROM Data Memory
- SRAM Data Memory
- Program and Data Addressing Modes
- Register Direct, Single Register Rd
- Register Direct, Two Registers Rd and Rr
- I/O Direct
- Data Direct
- Data Indirect with Displacement
- Data Indirect
- Data Indirect with Pre- decrement
- Data Indirect with Post- increment
- Constant Addressing Using the LPM Instruction
- Indirect Program Addressing, IJMP and ICALL
- Relative Program Addressing, RJMP and RCALL
- Memory Access and Instruction Execution Timing
- I/O Memory
- Reset and Interrupt Handling
- Reset Sources
- Power-on Reset
- External Reset
- Watchdog Reset
- MCU Status Register – MCUSR
- Interrupt Handling
- General Interrupt Mask Register – GIMSK
- General Interrupt Flag Register – GIFR
- Timer/Counter Interrupt Mask Register – TIMSK
- Timer/Counter Interrupt FLAG Register – TIFR
- External Interrupt
- Interrupt Response Time
- MCU Control Register – MCUCR
- Sleep Modes
- Timer/Counter
- Watchdog Timer
- EEPROM Read/Write Access
- I/O Port B
- Memory Programming
- Electrical Characteristics
- Typical Characteristics
- AT90S2323/2343 Register Summary
- Ordering Information
- Packaging Information
29
AT90S/LS2323/2343
1004D–09/01
Figure 30. Timer/Counter 0 Block Diagram
Timer/Counter0 Control
Register – TCCR0
• Bits 7..3 – Res: Reserved Bits
These bits are reserved bits in the AT90S2323/2343 and always read zero.
• Bits 2, 1, 0 – CS02, CS01, CS00: Clock Select0, Bits 2, 1 and 0
The Clock Select0 bits 2, 1 and 0 define the prescaling source of Timer/Counter0.
T0
Bit 76 5 4 3 210
$33 ($53) –– – – –CS02 CS01 CS00 TCCR0
Read/Write R R R R R R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Table 10. Clock 0 Prescale Select
CS02 CS01 CS00 Description
0 0 0 Stop, the Timer/Counter0 is stopped.
001CK
010CK/8
011CK/64
1 0 0 CK/256
1 0 1 CK/1024
1 1 0 External Pin T0, falling edge
1 1 1 External Pin T0, rising edge