Manual
Table Of Contents
- Features
- Description
- Architectural Overview
- General-purpose Register File
- ALU – Arithmetic Logic Unit
- In-System Programmable Flash Program Memory
- EEPROM Data Memory
- SRAM Data Memory
- Program and Data Addressing Modes
- Register Direct, Single Register Rd
- Register Direct, Two Registers Rd and Rr
- I/O Direct
- Data Direct
- Data Indirect with Displacement
- Data Indirect
- Data Indirect with Pre- decrement
- Data Indirect with Post- increment
- Constant Addressing Using the LPM Instruction
- Indirect Program Addressing, IJMP and ICALL
- Relative Program Addressing, RJMP and RCALL
- Memory Access and Instruction Execution Timing
- I/O Memory
- Reset and Interrupt Handling
- Reset Sources
- Power-on Reset
- External Reset
- Watchdog Reset
- MCU Status Register – MCUSR
- Interrupt Handling
- General Interrupt Mask Register – GIMSK
- General Interrupt Flag Register – GIFR
- Timer/Counter Interrupt Mask Register – TIMSK
- Timer/Counter Interrupt FLAG Register – TIFR
- External Interrupt
- Interrupt Response Time
- MCU Control Register – MCUCR
- Sleep Modes
- Timer/Counter
- Watchdog Timer
- EEPROM Read/Write Access
- I/O Port B
- Memory Programming
- Electrical Characteristics
- Typical Characteristics
- AT90S2323/2343 Register Summary
- Ordering Information
- Packaging Information
36
AT90S/LS2323/2343
1004D–09/01
Port B Input Pins Address –
PINB
The Port B Input Pins address (PINB) is not a register and this address enables access
to the physical value on each Port B pin. When reading PORTB, the Port B Data Latch
is read and when reading PINB, the logical values present on the pins are read.
Port B as General Digital
I/O
All pins in port B have equal functionality when used as digital I/O pins.
PBn, general I/O pin: The DDBn bit in the DDRB register selects the direction of this pin,
if DDBn is set (one), PBn is configured as an output pin. If DDBn is cleared (zero), PBn
is configured as an input pin. If PORTBn is set (one) when the pin is configured as an
input pin, the MOS pull-up resistor is activated. To switch the pull-up resistor off, the
PORTBn has to be cleared (zero) or the pin has to be configured as an output pin. The
port pins are tri-stated when a reset condition becomes active, even if the clock is not
running.
Alternate Functions of Port B The alternate pin functions of Port B are as follows:
• CLOCK – Port B, Bit 3
Clock input: AT90S/LS2343 only. When the RCEN fuse is programmed and the device
runs from the internal RC oscillator, this pin is a general I/O pin. When the RCEN fuse is
unprogrammed, an external clock source must be connected to CLOCK.
• SCK/T0 – Port B, Bit 2
In Serial Programming mode, this bit serves as the serial clock input, SCK.
During normal operation, this pin can serve as the external counter clock input. See the
timer/counter description for further details. If external timer/counter clocking is selected,
activity on this pin will clock the counter even if it is configured as an output.
• MISO/INT0 – Port B, Bit 1
In Serial Programming mode, this bit serves as the serial data output, MISO.
During normal operation, this pin can serve as the external interrupt0 input. See the
interrupt description for details on how to enable this interrupt. Note that activity on this
pin will trigger the interrupt even if the pin is configured as an output.
• MOSI – Port B, Bit 0
In Serial Programming mode, this pin serves as the serial data input, MOSI.
Bit 76543210
$16 ($36) –––PINB4 PINB3 PINB2 PINB1 PINB0 PINB
Read/WriteRRRRRRRR
Initial Value 0 0 0 N/A N/A N/A N/A N/A
Table 13. DDBn Effects on Port B Pins
DDBn PORTBn I/O Pull-up Comment
0 0 Input No Tri-state (high-Z)
0 1 Input Yes PBn will source current if ext. pulled low
1 0 Output No Push-pull Zero Output
1 1 Output No Push-pull One Output