Manual
Table Of Contents
- Features
- Description
- Architectural Overview
- General-purpose Register File
- ALU – Arithmetic Logic Unit
- In-System Programmable Flash Program Memory
- EEPROM Data Memory
- SRAM Data Memory
- Program and Data Addressing Modes
- Register Direct, Single Register Rd
- Register Direct, Two Registers Rd and Rr
- I/O Direct
- Data Direct
- Data Indirect with Displacement
- Data Indirect
- Data Indirect with Pre- decrement
- Data Indirect with Post- increment
- Constant Addressing Using the LPM Instruction
- Indirect Program Addressing, IJMP and ICALL
- Relative Program Addressing, RJMP and RCALL
- Memory Access and Instruction Execution Timing
- I/O Memory
- Reset and Interrupt Handling
- Reset Sources
- Power-on Reset
- External Reset
- Watchdog Reset
- MCU Status Register – MCUSR
- Interrupt Handling
- General Interrupt Mask Register – GIMSK
- General Interrupt Flag Register – GIFR
- Timer/Counter Interrupt Mask Register – TIMSK
- Timer/Counter Interrupt FLAG Register – TIFR
- External Interrupt
- Interrupt Response Time
- MCU Control Register – MCUCR
- Sleep Modes
- Timer/Counter
- Watchdog Timer
- EEPROM Read/Write Access
- I/O Port B
- Memory Programming
- Electrical Characteristics
- Typical Characteristics
- AT90S2323/2343 Register Summary
- Ordering Information
- Packaging Information
4
AT90S/LS2323/2343
1004D–09/01
chip, the Atmel AT90S2323/2343 is a powerful microcontroller that provides a highly
flexible and cost-effective solution to many embedded control applications.
The AT90S2323/2343 AVR is supported with a full suite of program and system devel-
opment tools including: C compilers, macro assemblers, program debugger/simulators,
in-circuit emulators and evaluation kits.
Comparison between
AT90S/LS2323 and
AT90S/LS2343
The AT90S/LS2323 is intended for use with external quartz crystal or ceramic resonator
as the clock source. The start-up time is fuse-selectable as either 1 ms (suitable for
ceramic resonator) or 16 ms (suitable for crystal). The device has three I/O pins.
The AT90S/LS2343 is intended for use with either an external clock source or the inter-
nal RC oscillator as clock source. The device has five I/O pins.
Table 1 summarizes the differences in features of the two devices.
Pin Descriptions
AT90S/LS2323
VCC Supply voltage pin.
GND Ground pin.
Port B (PB2..PB0) Port B is a 3-bit bi-directional I/O port with internal pull-up resistors. The Port B output
buffers can sink 20 mA. As inputs, Port B pins that are externally pulled low, will source
current if the pull-up resistors are activated.
Port B also serves the functions of various special features.
Port pins can provide internal pull-up resistors (selected for each bit). The Port B pins
are tri-stated when a reset condition becomes active.
RESET
Reset input. An external reset is generated by a low level on the RESET pin. Reset
pulses longer than 50 ns will generate a reset, even if the clock is not running. Shorter
pulses are not guaranteed to generate a reset.
XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
XTAL2 Output from the inverting oscillator amplifier.
Table 1. Feature Difference Summary
Part AT90S/LS2323 AT90S/LS2343
On-chip Oscillator Amplifier yes no
Internal RC Clock no yes
PB3 available as I/O pin never internal clock mode
PB4 available as I/O pin never always
Start-up time 1 ms/16 ms 16 µs fixed