Manual
Table Of Contents
- Features
- Description
- Architectural Overview
- General-purpose Register File
- ALU – Arithmetic Logic Unit
- In-System Programmable Flash Program Memory
- EEPROM Data Memory
- SRAM Data Memory
- Program and Data Addressing Modes
- Register Direct, Single Register Rd
- Register Direct, Two Registers Rd and Rr
- I/O Direct
- Data Direct
- Data Indirect with Displacement
- Data Indirect
- Data Indirect with Pre- decrement
- Data Indirect with Post- increment
- Constant Addressing Using the LPM Instruction
- Indirect Program Addressing, IJMP and ICALL
- Relative Program Addressing, RJMP and RCALL
- Memory Access and Instruction Execution Timing
- I/O Memory
- Reset and Interrupt Handling
- Reset Sources
- Power-on Reset
- External Reset
- Watchdog Reset
- MCU Status Register – MCUSR
- Interrupt Handling
- General Interrupt Mask Register – GIMSK
- General Interrupt Flag Register – GIFR
- Timer/Counter Interrupt Mask Register – TIMSK
- Timer/Counter Interrupt FLAG Register – TIFR
- External Interrupt
- Interrupt Response Time
- MCU Control Register – MCUCR
- Sleep Modes
- Timer/Counter
- Watchdog Timer
- EEPROM Read/Write Access
- I/O Port B
- Memory Programming
- Electrical Characteristics
- Typical Characteristics
- AT90S2323/2343 Register Summary
- Ordering Information
- Packaging Information
58
AT90S/LS2323/2343
1004D–09/01
Note: 1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses
should never be written.
2. Some of the status flags are cleared by writing a logical “1” to them. Note that the CBI and SBI instructions will operate on all
bits in the I/O register, writing a one back into any flag read as set, thus clearing the flag. The CBI and SBI instructions work
with registers $00 to $1F only.
AT90S2323/2343 Register Summary
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page
$3F ($5F) SREG I T H S V N Z C page 18
$3E ($5E) Reserved
$3D ($5D) SPL SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0 page 19
$3C ($5C) Reserved
$3B ($5B) GIMSK -INT0 - - - - - - page 24
$3A ($5A) GIFR -INTF0 page 25
$39 ($59) TIMSK - - - - - -TOIE0- page 25
$38 ($58) TIFR
- - - - - -TOV0- page 25
$37 ($57) Reserved
$36 ($56) Reserved
$35 ($55) MCUCR - -SESM- - ISC01 ISC00 page 26
$34 ($54) MCUSR - - - - - - EXTRF PORF page 23
$33 ($53) TCCR0 - - - - - CS02 CS01 CS00 page 29
$32 ($52) TCNT0 Timer/Counter0 (8 Bits) page 30
$31 ($51) Reserved
$30 ($50) Reserved
$2F ($4F) Reserved
$2E ($4E) Reserved
$2D ($4D) Reserved
$2C ($4C) Reserved
$2B ($4B) Reserved
$2A ($4A) Reserved
$29 ($49) Reserved
$28 ($48) Reserved
$27 ($47) Reserved
$26 ($46) Reserved
$25 ($45) Reserved
$24 ($44) Reserved
$23 ($43) Reserved
$22 ($42) Reserved
$21 ($41) WDTCR - - - WDTOE WDE WDP2 WDP1 WDP0 page 31
$20 ($40) Reserved
$1F ($3F) Reserved
$1E ($3E) EEAR - EEPROM Address Register page 32
$1D ($3D) EEDR EEPROM Data Register page 32
$1C ($3C) EECR - - - - - EEMWE EEWE EERE page 33
$1B ($3B) Reserved
$1A ($3A) Reserved
$19 ($39) Reserved
$18 ($38) PORTB - - - PORTB4 PORTB3 PORTB2 PORTB1 PORTB0 page 35
$17 ($37) DDRB
- - - DDB4 DDB3 DDB2 DDB1 DDB0 page 35
$16 ($36) PINB - - - PINB4 PINB3 PINB2 PINB1 PINB0 page 36
$15 ($35) Reserved
… Reserved
$00 ($20) Reserved