Manual
87
AT90S/LS8535
1041H–11/01
Port D Data Register – PORTD
Port D Data Direction Register
– DDRD
Port D Input Pins Address –
PIND
The Port D Input Pins address (PIND) is not a register; this address enables access to
the physical value on each Port D pin. When reading PORTD, the Port D Data Latch is
read and when reading PIND, the logical values present on the pins are read.
Port D As General Digital I/O PDn, general I/O pin: The DDDn bit in the DDRD register selects the direction of this pin.
If DDDn is set (one), PDn is configured as an output pin. If DDDn is cleared (zero), PDn
is configured as an input pin. If PDn is set (one) when configured as an input pin, the
MOS pull-up resistor is activated. To switch the pull-up resistor off, the PDn has to be
cleared (zero) or the pin has to be configured as an output pin.The port pins are tri-
stated when a reset condition becomes active, even if the clock is not running.
Note: n: 7,6…0, pin number.
Alternate Functions of Port D • OC2 – Port D, Bit 7
OC2, Timer/Counter2 output compare match output: The PD7 pin can serve as an
external output for the Timer/Counter2 output compare. The pin has to be configured as
an output (DDD7 set [one]) to serve this function. See the timer description on how to
enable this function. The OC2 pin is also the output pin for the PWM mode timer
function.
• ICP – Port D, Bit 6
ICP – Input Capture Pin: The PD6 pin can act as an input capture pin for
Timer/Counter1. The pin has to be configured as an input (DDD6 cleared [zero]) to
serve this function. See the timer description on how to enable this function.
Bit 76543210
$12 ($32)
PORTD7 PORTD6 PORTD5 PORTD4 PORTD3 PORTD2 PORTD1 PORTD0 PORTD
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
$11 ($31) DDD7 DDD6 DDD5 DDD4 DDD3 DDD2 DDD1 DDD0 DDRD
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 76543210
$10 ($30) PIND7 PIND6 PIND5 PIND4 PIND3 PIND2 PIND1 PIND0 PIND
Read/WriteRRRRRRRR
Initial Value N/A N/A N/A N/A N/A N/A N/A N/A
Table 34. DDDn Bits on Port D Pins
DDDn PORTDn I/O Pull-up Comment
0 0 Input No Tri-state (high-Z)
0 1 Input Yes PDn will source current if ext. pulled low
1 0 Output No Push-pull Zero Output
1 1 Output No Push-pull One Output