Manual

223
6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
Figure 23-10. Burst Read Access, Latency =2, DDR-SDRAM Devices
Figure 23-11. Burst Read Access, Latency =2, SDR-SDRAM Devices
Col a
NOP READ NOP
0
Latency =2
SDCLKN
SDCLK
A[12:0]
COMMAND
BA[1:0]
DQS[1:0]
Da
Db
Dc
Dd De Df Dg Dh
D[15:0]
3
DM[1:0]
Latency = 2
SDCLK
col a
A[12:0]
NOP
READ
NOP
BST
NOP
COMMAND
0
BA[1:0]
DaDb
DcDd DeDf Dg Dh
D[31:0]
F
DM[3:0]
DQS[1:0]