
250
6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
Figure 24-4. Single Write Access with Refresh Collision
Figure 24-5. Burst Write Access with No Refresh Collision
D0 D1
Latency = 5
A[27:0]
BCADV
BCCS
BCCK
BCCRE
D[31:0]
BCOE
BCWE
BCOWAIT
D0 D1 D2 D3
Latency = 3
A[27:0]
BCADV
BCCS
BCCK
BCCRE
D[31:0]
BCOE
BCWE
BCOWAIT