Manual

257
6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
24.5 BCRAMC User Interface
The User interface is connected to the APB bus. The BCRAMC is programmed using the regis-
ters listed in Table 24-1.
Notes: 1. Values in the Version Register vary with the version of the IP block implementation.
2. Values in the BCRAMC_ADDRSIZE register are product dependent. For more information, see “BCRAMC ADDRSIZE Reg-
ister” on page 263.
Table 24-1. BCRAMC Memory Map
Offset Register Name Access Reset State
0x00
BCRAMC Configuration Register BCRAMC_CR Read/Write 0x00000130
0x04
BCRAMC Timing Register BCRAMC_TR Read/Write 0x004
0x0C
BCRAMC Low Power register BCRAMC_LPR Read/Write 0x0
0x10
BCRAMC Memory Device Register BCRAMC_MDR Read/Write 0x0
0x14 - 0xE8 Reserved
0xEC BCRAMC Address Size Register BCRAMC_ADDRSIZE Read-only 0x-
(2)
0xF0 BCRAMC IP Name1 BCRAMC_IPNAME1 Read-only “HBCR”
0xF4
BCRAMC IP Name2 BCRAMC_IPNAME2 Read-only “AMC1“
0xF8
BCRAMC Features Registers BCRAMC_FEATURES Read-only 0x