Manual

26
6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
– SDRAM with 16- or 32-bit Data Path
– Mobile DDR with four Internal Banks
– Mobile DDR with 16-bit Data Path
• Programming facilities
– Word, half-word, byte access
– Automatic page break when Memory Boundary has been reached
– Multibank Ping-pong Access
– Timing parameters specified by software
– Automatic refresh operation, refresh rate is programmable
– Multiport (4 Ports)
• Energy-saving capabilities
– Self-refresh, power down and deep power down modes supported
• Error detection
– Refresh Error Interrupt
• DDR/SDRAM Power-up Initialization by software
• SDRAM CAS Latency of 1, 2 and 3 supported
• DDR CAS latency of 3 supported
• Auto Precharge Command not used
8.2.4 Burst Cellular RAM Controller
• Supported devices:
– Synchronous Cellular RAM version 1.0, 1.5 and 2.0
• Numerous configurations supported
– 64K, 128K, 256K, 512K Row Address Memory Parts
– Cellular RAM with 16- or 32-bit Data Path
• Programming facilities
– Word, half-word, byte access
– Automatic page break when Memory Boundary has been reached
– Timing parameters specified by software
– Only Continuous read or write burst supported
• Energy-saving capabilities
– Standby and Deep Power Down (DPD) modes supported
– Low Power features (PASR/TCSR) supported
• Cellular RAM Power-up Initialization by hardware
• Cellular RAM CAS latency of 2 and 3 supported (Version 1.0)
• Cellular RAM CAS latency of 2, 3, 4, 5 and 6 supported (Version 1.5 and 2.0)
• Cellular RAM variable or fixed latency supported (Version 1.5 and 2.0)
• Multiplexed address/data bus supported (Version 2.0)
• Asynchronous and Page mode not supported.