Manual

293
6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
Figure 26-8. Multi-buffer with Linked Address for Source and Destination Buffers are Contiguous
The DMAC transfer flow is shown in Figure 26-9 on page 294.
SADDR(2)
SADDR(1)
SADDR(0)
DADDR(2)
DADDR(1)
DADDR(0)
Buffer 2
Buffer 1
Buffer 0
Buffer 0
Buffer 1
Buffer 2
Address of
Source Layer
Address of
Destination Layer
Source Buffers
Destination Buffers
SADDR(3)
Buffer 2
DADDR(3)
Buffer 2