Manual

309
6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
26.5 DMA Controller (DMAC) User Interface
Table 26-2. DMAC Register Mapping
Offset Register Name Access Reset State
0x000 DMAC Global Configuration Register DMAC_GCFG Read/Write 0x10
0x004 DMAC Enable Register DMAC_EN Read/Write 0x0
0x008 DMAC Software Single Request Register DMAC_SREQ Read/Write 0x0
0x00C DMAC Software Chunk Transfer Request Register DMAC_CREQ Read/Write 0x0
0x010 DMAC Software Last Transfer Flag Register DMAC_LAST Read/Write 0x0
0x014 DMAC Request Synchronization Register DMAC_SYNC Read/Write 0x0
0x018
DMAC Error, Chained Buffer transfer completed and
Buffer transfer completed Interrupt Enable register.
DMAC_EBCIER Write-only –
0x01C
DMAC Error, Chained Buffer transfer completed and
Buffer transfer completed Interrupt Disable register.
DMAC_EBCIDR Write-only –
0x020
DMAC Error, Chained Buffer transfer completed and
Buffer transfer completed Mask Register.
DMAC_EBCIMR Read-only 0x0
0x024
DMAC Error, Chained Buffer transfer completed and
Buffer transfer completed Status Register.
DMAC_EBCISR Read-only 0x0
0x028 DMAC Channel Handler Enable Register DMAC_CHER Write-only –
0x02C DMAC Channel Handler Disable Register DMAC_CHDR Write-only –
0x030 DMAC Channel Handler Status Register DMAC_CHSR Read-only 0x00FF0000
0x034 Reserved – – –
0x038 Reserved – – –
0x03C DMAC Channel 0 Source Address Register DMAC_SADDR0 Read/Write 0x0
0x040 DMAC Channel 0 Destination Address Register DMAC_DADDR0 Read/Write 0x0
0x044 DMAC Channel 0 Descriptor Address Register DMAC_DSCR0 Read/Write 0x0
0x048 DMAC Channel 0 Control A Register DMAC_CTRLA0 Read/Write 0x0
0x04C DMAC Channel 0 Control B Register DMAC_CTRLB0 Read/Write 0x0
0x050 DMAC Channel 0 Configuration Register DMAC_CFG0 Read/Write 0x01000000
0x054
DMAC Channel 0 Source Picture in Picture
Configuration Register
DMAC_SPIP0 Read/Write 0x0
0x058
DMAC Channel 0 Destination Picture in Picture
Configuration Register
DMAC_DPIP0 Read/Write 0x0
0x05C Reserved – – –
0x060 Reserved – – –
0x064 DMAC Channel 1 Source Address Register DMAC_SADDR1 Read/Write 0x0
0x068 DMAC Channel 1 Destination Address Register DMAC_DADDR1 Read/Write 0x0
0x06C DMAC Channel 1 Descriptor Address Register DMAC_DSCR1 Read/Write 0x0
0x070 DMAC Channel 1 Control A Register DMAC_CTRLA1 Read/Write 0x0
0x074 DMAC Channel 1 Control B Register DMAC_CTRLB1 Read/Write 0x0
0x078 DMAC Channel 1 Configuration Register DMAC_CFG1 Read/Write 0x01000000