Manual

316
6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
26.5.6 DMAC Error, Buffer Transfer and Chained Buffer Transfer Interrupt Enable Register
Name: DMAC_EBCIER
Access: Write-only
Reset Value: 0x00000000
• BTC[3:0]
Buffer Transfer Completed Interrupt Enable Register. Set the relevant bit in the BTC field to enable the interrupt for channel
i.
• CBTC[3:0]
Chained Buffer Transfer Completed Interrupt Enable Register. Set the relevant bit in the CBTC field to enable the interrupt
for channel i.
• ERR[3:0]
Access Error Interrupt Enable Register. Set the relevant bit in the ERR field to enable the interrupt for channel i.
31 30 29 28 27 26 25 24
––––––––
23 22 21 20 19 18 17 16
––––ERR3ERR2ERR1ERR0
15 14 13 12 11 10 9 8
––––CBTC3CBTC2CBTC1CBTC0
76543210
––––BTC3BTC2BTC1BTC0