Manual

323
6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
26.5.13 DMAC Channel x [x = 0..3] Source Address Register
Name: DMAC_SADDRx [x = 0..3]
Access: Read/Write
Reset Value: 0x00000000
• SADDRx
Channel x source address. This register must be aligned with the source transfer width.
31 30 29 28 27 26 25 24
SADDRx
23 22 21 20 19 18 17 16
SADDRx
15 14 13 12 11 10 9 8
SADDRx
76543210
SADDRx