Manual

33
6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
10. Peripherals
10.1 User Interface
The peripherals are mapped in the upper 256 Mbytes of the address space between the
addresses 0xFFFA 0000 and 0xFFFC FFFF. Each user peripheral is allocated 16 Kbytes of
address space.
A complete memory map is presented in Figure 8-1 on page 22.
10.2 Identifiers
The AT91CAP9S500A/AT91CAP9S250A embeds a wide range of peripherals. Table 10-1
defines the Peripheral Identifiers of the AT91CAP9S500A/AT91CAP9S250A. A peripheral iden-
tifier is required for the control of the peripheral interrupt with the Advanced Interrupt Controller
and for the control of the peripheral clock with the Power Management Controller.
Table 10-1. AT91CAP9S500A/AT91CAP9S250A Peripheral Identifiers
Peripheral
ID
Peripheral
Mnemonic Peripheral Name
External
Interrupt
0 AIC Advanced Interrupt Controller FIQ
1 SYSC System Controller Interrupt
2 PIOA-D Parallel I/O Controller A to D
3 MPB0 MP Block Peripheral 0
4 MPB1 MP Block Peripheral 1
5 MPB2 MP Block Peripheral 2
6 MPB3 MP Block Peripheral 3
7 MPB4 MP Block Peripheral 4
8 US0 USART 0
9 US1 USART 1
10 US2 USART 2
11 MCI0 Multimedia Card Interface 0
12 MCI1 Multimedia Card Interface 1
13 CAN CAN Controller
14 TWI Two-Wire Interface
15 SPI0 Serial Peripheral Interface 0
16 SPI1 Serial Peripheral Interface 1
17 SSC0 Synchronous Serial Controller 0
18 SSC1 Synchronous Serial Controller 1
19 AC97 AC97 Controller
20 TC0, TC1, TC2 Timer/Counter 0, 1 and 2
21 PWMC Pulse Width Modulation Controller
22 EMAC Ethernet MAC
23 Reserved Reserved