Manual

6264A–CAP–21-May-07

AT91CAP9S500A/AT91CAP9S250A

34.10.7 TWI Interrupt Enable Register

Name: TWI_IER

Access: Write-only

Reset Value: 0x00000000

• TXCOMP: Transmission Completed Interrupt Enable

• RXRDY: Receive Holding Register Ready Interrupt Enable

• TXRDY: Transmit Holding Register Ready Interrupt Enable

• SVACC: Slave Access Interrupt Enable

• GACC: General Call Access Interrupt Enable

• OVRE: Overrun Error Interrupt Enable

• NACK: Not Acknowledge Interrupt Enable

• ABRLST: Arbitration Lost Interrupt Enable

• SCL_WS: Clock Wait State Interrupt Enable

• ENDRX: End of Receive Buffer Interrupt Enable

• ENDTX: End of Transmit Buffer Interrupt Enable

• RXBUFF: Receive Buffer Full Interrupt Enable

• TXBUFE: Transmit Buffer Empty Interrupt Enable

0 = No effect.

1 = Enables the corresponding interrupt.

31 30 29 28 27 26 25 24

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23 22 21 20 19 18 17 16

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15 14 13 12 11 10 9 8

TXBUFE RXBUFF ENDTX ENDRX EOSACC SCL_WS ARBLST NACK

76543210

– OVRE GACC SVACC – TXRDY RXRDY TXCOMP