Manual

632
6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
37.7 AC’97 Controller (AC97C) User Interface
Table 37-4. Register Mapping
Offset Register Register Name Access Reset
0x0-0x4 Reserved – – –
0x8 Mode Register AC97C_MR Read/Write 0x0
0xC Reserved – – –
0x10 Input Channel Assignment Register AC97C_ICA Read/Write 0x0
0x14 Output Channel Assignment Register AC97C_OCA Read/Write 0x0
0x18-0x1C Reserved – – –
0x20 Channel A Receive Holding Register AC97C_CARHR Read 0x0
0x24 Channel A Transmit Holding Register AC97C_CATHR Write –
0x28 Channel A Status Register AC97C_CASR Read 0x0
0x2C Channel A Mode Register AC97C_CAMR Read/Write 0x0
0x30 Channel B Receive Holding Register AC97C_CBRHR Read 0x0
0x34 Channel B Transmit Holding Register AC97C_CBTHR Write –
0x38 Channel B Status Register AC97C_CBSR Read 0x0
0x3C Channel B Mode Register AC97C_CBMR Read/Write 0x0
0x40 Codec Receive Holding Register AC97C_CORHR Read 0x0
0x44 Codec Transmit Holding Register AC’97C_COTHR Write –
0x48 Codec Status Register AC’97C_COSR Read 0x0
0x4C Codec Mode Register AC’97C_COMR Read/Write 0x0
0x50 Status Register AC97C_SR Read 0x0
0x54 Interrupt Enable Register AC97C_IER Write –
0x58 Interrupt Disable Register AC97C_IDR Write –
0x5C Interrupt Mask Register AC97C_IMR Read 0x0
0x60 Channel C Receive Holding Register AC97C_CCRHR Read 0x0
0x64 Channel C Transmit Holding Register AC97C_CCTHR Write –
0x68 Channel C Status Register AC97C_CCSR Read 0x0
0x6C Channel C Mode Register AC97C_CCMR Read/Write 0x0
0x60-0xFB Reserved – – –
0x100- 0x124
Reserved for Peripheral Data Controller (PDC),
registers related to Channel A transfers
AC97C_CARPR,
AC97C_CARCR,
AC97C_CATPR,
AC97C_CATCR,
AC97C_CARNPR,
AC97C_CARNCR,
AC97C_CATNPR,
AC97C_CATNCR,
AC97C_CAPTCR,
AC97C_CAPTSR
– –