Manual

6264A–CAP–21-May-07

AT91CAP9S500A/AT91CAP9S250A

14.4 DataFlash Boot

The DataFlash Boot program searches for a valid application in the SPI DataFlash memory. If

a valid application is found, this application is loaded into internal SRAM and executed by

branching at address 0x0000_0000 after remap. This application may be the application code

or a second-level bootloader.

All the calls to functions are PC relative and do not use absolute addresses.

After reset, the code in internal ROM is mapped at both addresses 0x0000_0000 and

0x0040_0000:

400000 ea000006 B 0x20 00 ea000006 B 0x20

400004 eafffffe B 0x04 04 eafffffe B 0x04

400008 ea00002f B _main 08 ea00002f B _main

40000c eafffffe B 0x0c 0c eafffffe B 0x0c

400010 eafffffe B 0x10 10 eafffffe B 0x10

400014 eafffffe B 0x14 14 eafffffe B 0x14

400018 eafffffe B 0x18 18 eafffffe B 0x18

14.4.1 Valid Image Detection

The DataFlash Boot software looks for a valid application by analyzing the first 28 bytes corre-

sponding to the ARM exception vectors. These bytes must implement ARM instructions for

either branch or load PC with PC relative addressing.

The sixth vector, at offset 0x14, contains the size of the image to download. The user must

replace this vector with his own vector (see ”Structure of ARM Vector 6” on page 76).

Figure 14-3. LDR Opcode

Figure 14-4. B Opcode

Unconditional instruction: 0xE for bits 31 to 28

Load PC with PC relative addressing instruction:

– Rn = Rd = PC = 0xF

–I==1

–P==1

– U offset added (U==1) or subtracted (U==0)

–W==1

14.4.2 Structure of ARM Vector 6

The ARM exception vector 6 is used to store information needed by the DataFlash boot pro-

gram. This information is described below.

31 28 27 24 23 20 19 16 15 12 11 0

111011IPU1W0 Rn Rd

31 28 27 24 23 0

1 1 1 0 1 0 1 0 Offset (24 bits)