Manual

83
6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
Before performing the jump to the application in internal SRAM, all the PIOs and peripherals
used in the boot program are set to their reset state.
Table 14-7. Pins Driven during Boot Program Execution
Peripheral Pin PIO Line
SPI0 MOSI PIOA1
SPI0 MISO PIOA0
SPI0 SPCK PIOA2
SPI0 NPCS0 PIOA5
PIOD NANDCS PIOD15
Address Bus NAND ALE A21
Address Bus NAND CLE A22
DBGU DRXD PIOC30
DBGU DTXD PIOC31