Manual

975
6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
Notes: 1. Control is the set of following timings : A0-A9, A11-A13, SDCKE, SDCS, RAS, CAS, SDA10,
BAx, DQMx, and SDWE
2. 133 MHz with CL= 3, 100 MHz with CL= 2
Table 47-31. Mobile Characteristics
Parameter
Min Max
Unit1.8V Supply 1.8V Supply
SDRAM Controller Clock Frequency 133 / 100
(2)
MHz
Control/Address/Data In Setup
(1)
1.5 ns
Control/Address/Data In Hold
(1)
1ns
Data Out Access time after SDCK rising 6 ns
Data Out change time after SDCK rising 2.5 ns