Manual

ii
6264A–CAP–21-May-07
AT91CAP9S500A/AT91CAP9S250A
9.2 Reset Controller .....................................................................................29
9.3 Shutdown Controller ...............................................................................29
9.4 Clock Generator .....................................................................................29
9.5 Power Management Controller ...............................................................30
9.6 Periodic Interval Timer ...........................................................................30
9.7 Watchdog Timer .....................................................................................31
9.8 Real-time Timer ......................................................................................31
9.9 General-Purpose Backed-up Registers ..................................................31
9.10 Advanced Interrupt Controller ..............................................................31
9.11 Debug Unit ...........................................................................................31
9.12 Chip Identification .................................................................................32
9.13 PIO Controllers .....................................................................................32
10 Peripherals .................................................................................33
10.1 User Interface .......................................................................................33
10.2 Identifiers ..............................................................................................33
10.3 Peripherals Signals Multiplexing on I/O Lines ......................................35
10.4 Embedded Peripherals .........................................................................40
11 Metal Programmable Block .......................................................45
11.1 Internal Connectivity .............................................................................45
11.2 External Connectivity ............................................................................47
11.3 Prototyping Solution .............................................................................47
12 ARM926EJ-S Processor Overview ...........................................49
12.1 Overview ..............................................................................................49
12.2 Block Diagram ......................................................................................50
12.3 ARM9EJ-S Processor ..........................................................................50
12.4 CP15 Coprocessor ...............................................................................58
12.5 Memory Management Unit (MMU) .......................................................61
12.6 Caches and Write Buffer ......................................................................62
12.7 Tightly-Coupled Memory Interface .......................................................64
12.8 Bus Interface Unit .................................................................................65
13 Debug and Test ..........................................................................67
13.1 Description ...........................................................................................67
13.2 Block Diagram ......................................................................................68
13.3 Application Examples ...........................................................................69
13.4 Debug and Test Pin Description ...........................................................70