User Manual

2
ATA5756/ATA5757 [Preliminary]
4702D–RKE–02/04
Pin Configuration
Figure 2. Pinning MSOP10
1
2
3
4
10
9
8
7
CLK
ASK
FSK
ANT2
ENABLE
GND
VS
XTO1
ATA5756
ATA5757
5ANT1
6
XTO2
Pin Description
Pin Symbol Function Configuration
1CLK
Clock output signal for the
microcontroller.
The clock output frequency is set by the
crystal to f
XTAL
/8.
The CLK output stays Low in power-
down mode and after enabling of the
PLL.
The CLK output switches on if the
oscillation amplitude of the crystal has
reached a certain level.
2ASK
Switches on the power amplifier for
ASK modulation and enables the PLL
and XTO if the ENABLE pin is open
3FSK
Switches off the FSK switch (switch has
high Z if signal at pin FSK is High) and
enables the PLL and the XTO if the
ENABLE pin is open
CLK
VS
100
100
200k
ASK
50k
V
Ref
= 1.1V
20 µA
200k
FSK
200k
V
Ref
= 1.1V
5 µA
200k