Manual

ManualsBrandsRainbow Electronics ManualsSoftwareATA6625

Features

• Supply Voltage up to 40V

• Operating Voltage V

= 5V to 27V

• Typically 10 µA Supply Current During Sleep Mode

• Typically 57 µA Supply Current in Silent Mode

• Linear Low-drop Voltage Regulator:

– Normal, Fail-safe, and Silent Mode

– ATA6623: V

= 3.3V ±2%

– ATA6625: V

= 5.0V ±2%

– Sleep Mode: V

is Switched Off

• V

Undervoltage Detection with Reset Open Drain Output NRES (4 ms Reset Time)

• Voltage Regulator is Short-circuit and Over-temperature Protected

• LIN Physical Layer According to LIN Specification Revision 2.0 and SAEJ2602-2

• Wake-up Capability via LIN Bus (90 µs Dominant)

• TXD Time-out Timer

• Bus Pin is Overtemperature and Short-circuit Protected versus GND and Battery

• Advanced EMC and ESD Performance

• ESD HBM 8 kV at Pins LIN and VS Following STM5.1

• Interference and Damage Protection According to ISO/CD7637

• Package: SO8

1. Description

ATA6623/ATA6625 is a fully integrated LIN transceiver, designed according to the LIN

specification 2.0, with a low-drop voltage regulator (3.3V/5V/50 mA). The combination

of voltage regulator and bus transceiver makes it possible to develop simple, but pow-

erful, slave nodes in LIN Bus systems. ATA6623/ATA6625 is designed to handle the

low-speed data communication in vehicles (for example, in convenience electronics).

Improved slope control at the LIN driver ensures secure data communication up to

20 kBaud with an RC oscillator for the protocol handling. The bus output is designed

to withstand high voltage. Sleep mode (voltage regulator switched off) and Silent

mode (communication off; V

voltage on) guarantee minimized current consumption.

LIN Bus

Transceiver

with Integrated

Voltage

Regulator

ATA6623

ATA6625

4957E–AUTO–10/07

Summary of content (22 pages)

PAGE 1
Features • • • • • • • • • • • • • • • Supply Voltage up to 40V Operating Voltage VS = 5V to 27V Typically 10 µA Supply Current During Sleep Mode Typically 57 µA Supply Current in Silent Mode Linear Low-drop Voltage Regulator: – Normal, Fail-safe, and Silent Mode – ATA6623: VCC = 3.3V ±2% – ATA6625: VCC = 5.
PAGE 2
Figure 1-1. Block Diagram ATA6623/25 1 VS 4 LIN 8 VCC 7 NRES VCC RXD Normal and Fail-safe mode Receiver 5 + - RF-filter VCC Wake-up bus timer TXD EN Slew rate control TXD Time-out timer 6 2 Control unit GND Short circuit and overtemperature protection 3 Normal/Silent/ Fail-safe mode 3.3V/50 mA/2% 5V/50 mA/2% Sleep mode VCC switched off Undervoltage reset 2. Pin Configuration Figure 2-1. Pinning SO8 VS EN GND LIN Table 2-1.
PAGE 3
ATA6623/ATA6625 3. Functional Description 3.1 Physical Layer Compatibility Since the LIN physical layer is independent from higher LIN layers (e.g., LIN protocol layer), all nodes with a LIN physical layer according to revision 2.0 can be mixed with LIN physical layer nodes, which are according to older versions (i.e., LIN 1.0, LIN 1.1, LIN 1.2, LIN 1.3) without any restrictions. 3.2 Supply Pin (VS) LIN operating voltage is VS = 5V to 27V.
PAGE 4
3.7 Input Pin (TXD) In Normal mode the TXD pin is the microcontroller interface to control the state of the LIN output. TXD must be pulled to ground in order to drive the LIN bus low. If TXD is high or unconnected (internal pull-up resistor), the LIN output transistor is turned off and the bus is in the recessive state. 3.8 Dominant Time-out Function (TXD) The TXD input has an internal pull-up resistor. An internal timer prevents the bus line from being driven permanently in the dominant state.
PAGE 5
ATA6623/ATA6625 4. Mode of Operation Figure 4-1. Mode of Operation a: VS > 5V Unpowered Mode VBatt = 0V b b: VS < 4V c: Bus wake-up event d: NRES switches to low a Pre-normal Mode b b VCC: 3.3V/5V/50 mA with undervoltage monitoring Communication: OFF d EN = 1 c+d EN = 1 c Go to silent command b EN = 0 Silent Mode TXD = 1 Normal Mode Local wake-up event EN = 1 VCC: 3.3V/5V/50 mA with undervoltage monitoring VCC: 3.
PAGE 6
Table 4-1. 4.1 Mode of Operation Mode of Operation Transceiver VCC RXD LIN Fail safe OFF 3.3V/5V High Recessive Normal ON 3.3V/5V High TXD depending Silent OFF 3.3V/5V High Recessive Sleep OFF 0V 0V Recessive Normal Mode This is the normal transmitting and Receiving mode of the LIN Interface, in accordance with LIN specification 2.0. The VCC voltage regulator operates with a 3.3V/5V output voltage, with a low tolerance of ±2% and a maximum output current of 50 mA.
PAGE 7
ATA6623/ATA6625 Figure 4-2. Switch to Silent Mode Normal Mode Silent Mode EN Mode select window TXD td = 3.2 µs NRES VCC Delay time silent mode td_sleep = maximum 20 µs LIN LIN switches directly to recessive mode Figure 4-3. LIN Wake-up Waveform Diagram from Silent Mode Bus wake-up filtering time tbus Fail-safe mode Normal mode LIN bus RXD VCC Low High Silent mode 3.3V/5V/50 mA Fail-safe mode 3.
PAGE 8
4.3 Sleep Mode A falling edge at EN while TXD is low switches the IC into Sleep mode. The TXD Signal has to be logic low during the Mode Select window (Figure 4-4 on page 8). In Sleep mode the transmission path is disabled. Supply current from V Batt is typically IVSsleep = 10 µA. The VCC regulator is switched off; NRES and RXD are low. The internal slave termination between pin LIN and pin VS is disabled to minimize the power dissipation in case pin LIN is short-circuited to GND.
PAGE 9
ATA6623/ATA6625 Figure 4-5. LIN Wake-up Diagram from Sleep Mode Bus wake-up filtering time tbus Fail-safe Mode Low or floating Low Normal Mode LIN bus RXD VCC voltage regulator On state Off state Regulator wake-up time EN High EN Reset time NRES Low or floating Microcontroller start-up time delay 4.4 Fail-safe Mode At system power-up the device automatically switches to Fail-safe mode. The voltage regulator is switched on (VCC = 3.3V/5V/50 mA), (see Figure 6-1 on page 11).
PAGE 10
5. Fail-safe Features • During a short-circuit at LIN to VBattery, the output limits the output current to IBUS_LIM. Due to the power dissipation, the chip temperature exceeds TLINoff and the LIN output is switched off. The chip cools down and after a hysteresis of Thys, switches the output on again. RXD stays on high because LIN is high. During LIN overtemperature switch-off, the VCC regulator is working independently.
PAGE 11
ATA6623/ATA6625 6. Voltage Regulator Figure 6-1. VCC Voltage Regulator: Ramp Up and Undervoltage VS 12V 5.5V/3.8V VCC 5V/3.3V Vthun tVCC tReset tres_f NRES 5V/3.3V The voltage regulator needs an external capacitor for compensation and to smooth the disturbances from the microcontroller. It is recommended to use an electrolythic capacitor with C > 10 µF and a ceramic capacitor with C = 100 nF. The values of these capacitors can be varied by the customer, depending on the application.
PAGE 12
Figure 6-2. Power Dissipation: Save Operating Area versus VCC Output Current and Supply Voltage VS at Different Ambient Temperatures Due to Rthja = 80 K/W 60.00 Iout_85: Tamb = 85°C 50.00 Iout_85: Tamb = 95°C IVCC (mA) 40.00 Iout_105: Tamb = 105°C 30.00 20.00 10.00 0.
PAGE 13
ATA6623/ATA6625 7. Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Parameters Symbol Min. Supply voltage VS VS –0.
PAGE 14
8. Electrical Characteristics 5V < VS < 27V, –40°C < Tj < 150°C; unless otherwise specified all values refer to GND pins. No. 1 1.1 1.2 1.3 Parameters Test Conditions Pin Symbol Min. Typ. Max. Unit Type* VS VS 5 13.5 27 V A VS IVSsleep 3 10 14 µA A Sleep mode VLIN > VS – 0.
PAGE 15
ATA6623/ATA6625 8. Electrical Characteristics (Continued) 5V < VS < 27V, –40°C < Tj < 150°C; unless otherwise specified all values refer to GND pins. No. 5 Parameters Test Conditions Pin Symbol NRES Min. Typ. Max. Unit Type* VNRESL VNRESL 0.2 0.14 V V A A 0.2 V A 6 ms A NRES Open Drain Output Pin 5.1 VS ≥ 5.5V Low level output voltage INRES = 1 mA INRES = 250 µA 5.2 Low level output low 10 kΩ to VCC VCC = 0V NRES VNRESLL 5.3 Undervoltage reset time VVS ≥ 5.
PAGE 16
8. Electrical Characteristics (Continued) 5V < VS < 27V, –40°C < Tj < 150°C; unless otherwise specified all values refer to GND pins. No. Parameters Test Conditions Pin Symbol 7.7 Load regulation maximum 5 mA < IVCC < 50 mA VCC VCCload 7.8 Output current limitation VS > 5.5V VCC IVCCs –200 7.9 Load capacity 1Ω < ESR < 5Ω @ 100 kHz VCC Cload 1.8 7.10 VCC undervoltage threshold Referred to VCC VS > 5.5V VCC VthunN 4.2 7.
PAGE 17
ATA6623/ATA6625 8. Electrical Characteristics (Continued) 5V < VS < 27V, –40°C < Tj < 150°C; unless otherwise specified all values refer to GND pins. No. Parameters Test Conditions Pin Symbol Min. Typ. Max. Unit Type* VBUS_CNT = (Vth_dom + Vth_rec)/2 LIN VBUS_CNT 0.475 × VS 0.5 × VS 0.525 × VS V A 9 LIN Bus Receiver 9.1 Center of receiver threshold 9.2 Receiver dominant state VEN = 5V LIN VBUSdom –27 0.4 × VS V A 9.3 Receiver recessive state VEN = 5V LIN VBUSrec 0.
PAGE 18
8. Electrical Characteristics (Continued) 5V < VS < 27V, –40°C < Tj < 150°C; unless otherwise specified all values refer to GND pins. No. Parameters Test Conditions Pin 11 Receiver Electrical AC Parameters of the LIN Physical Layer LIN Receiver, RXD Load Conditions (CRXD): 20 pF; Rpull-up = 2.4 kΩ VS = 7.0V to 18V trx_pd = max(trx_pdr, trx_pdf) 11.1 Propagation delay of receiver Figure 8-1 11.2 Symmetry of receiver VS = 7.
PAGE 19
ATA6623/ATA6625 Figure 8-2. Application Circuit VCC 1 ATA6623/25 VBAT VS VCC RXD 5 + Normal and fail-safe mode Receiver + - 100 nF 4 22 µF LIN-BUS LIN RF filter 220 pF VCC Microcontroller Wake-up bus timer TXD EN 6 TXD Time-out timer Slew rate control 2 Control unit GND 3 Short circuit and overtemperature protection Sleep mode VCC switched off Normal Mode and silent mode 3.
PAGE 20
9. Ordering Information Extended Type Number Package ATA6623-TAPY Remarks SO8 3.3V LIN system basis chip, Pb-free, 1k, taped and reeled ATA6625-TAPY SO8 5V LIN system basis chip, Pb-free, 1k, taped and reeled ATA6623-TAQY SO8 3.3V LIN system basis chip, Pb-free, 4k, taped and reeled ATA6625-TAQY SO8 5V LIN system basis chip, Pb-free, 4k, taped and reeled 10. Package Information Package: SO 8 Dimensions in mm 5±0.2 4.9±0.1 0.1+0.15 1.4 0.2 3.7±0.1 0.4 1.27 3.8±0.1 6±0.2 3.
PAGE 21
ATA6623/ATA6625 11. Revision History Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this document. Revision No. History 4957E-AUTO-10/07 • Section 9 “Ordering Information” on page 20 changed • • • • 4957D-AUTO-07/07 • • • • Features changed Block diagram changed Application diagram changed Text changed under the headings: 3.2, 3.3, 3.4, 3.6, 3.7, 3.8, 3.9, 4, 4.1, 4.2, 4.3, 4.4, 4.5, 5.5, 5.
PAGE 22
Headquarters International Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Atmel Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369 Atmel Europe Le Krebs 8, Rue Jean-Pierre Timbaud BP 309 78054 Saint-Quentin-en-Yvelines Cedex France Tel: (33) 1-30-60-70-00 Fax: (33) 1-30-60-71-11 Atmel Japan 9F, Tonetsu Shinkawa Bldg.