Manual

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Features

• Supply Voltage up to 40V

• Operating Voltage V

= 5V to 27V

• Typically 10 µA Supply Current During Sleep Mode

• Typically 40 µA Supply Current in Silent Mode

• Linear Low-drop Voltage Regulator:

– Normal, Fail-safe, and Silent Mode

– ATA6629: V

= 3.3V ±2%

– ATA6631: V

= 5.0V ±2%

– Sleep Mode: V

is Switched Off

• V

Undervoltage Detection with Reset Open Drain Output NRES (4 ms Reset Time)

• Voltage Regulator is Short-circuit and Over-temperature Protected

• LIN Physical Layer According to LIN 2.0, 2.1 and SAEJ2602-2

• Wake-up Capability via LIN Bus (90 µs Dominant)

• TXD Time-out Timer

• Bus Pin is Overtemperature and Short-circuit Protected versus GND and Battery

• Advanced EMC and ESD Performance

• ESD HBM 8 kV at Pins LIN and VS Following STM5.1

• Interference and Damage Protection According to ISO/CD7637

• Package: SO8

1. Description

ATA6629/ATA6631 is a fully integrated LIN transceiver, designed according to the LIN

specification 2.0, 2.1 and SAEJ2602-2, with a low-drop voltage regulator

(3.3V/5V/50 mA). The combination of voltage regulator and bus transceiver makes it

possible to develop simple, but powerful, slave nodes in LIN Bus systems.

ATA6629/ATA6631 is designed to handle the low-speed data communication in vehi-

cles (for example, in convenience electronics). Improved slope control at the LIN

driver ensures secure data communication up to 20 kBaud with an RC oscillator for

the protocol handling. The bus output is designed to withstand high voltage. Sleep

Mode (voltage regulator switched off) and Silent Mode (communication off; V

volt-

age on) guarantee minimized current consumption.

LIN Bus

Transceiver

with Integrated

Voltage

Regulator

ATA6629

ATA6631

9165A–AUTO–11/09

Summary of content (25 pages)

PAGE 1
Features • • • • • • • • • • • • • • • Supply Voltage up to 40V Operating Voltage VS = 5V to 27V Typically 10 µA Supply Current During Sleep Mode Typically 40 µA Supply Current in Silent Mode Linear Low-drop Voltage Regulator: – Normal, Fail-safe, and Silent Mode – ATA6629: VCC = 3.3V ±2% – ATA6631: VCC = 5.
PAGE 2
Figure 1-1. Block Diagram ATA6629/ATA6631 1 VS 4 LIN 8 VCC 7 NRES VCC 5 kΩ RXD Normal and Fail-safe Mode Receiver 5 + RF-filter VCC Wake-up bus timer TXD EN 2 GND 3 Slew rate control TXD Time-out timer 6 Short-circuit and overtemperature protection Normal/Silent/ Fail-safe Mode 3.3V/50 mA/±2% 5V/50 mA/±2% Sleep mode Control VCC unit switched off Undervoltage reset 2. Pin Configuration Figure 2-1. Pinning SO8 VS EN GND LIN Table 2-1.
PAGE 3
ATA6629/ATA6631 3. Functional Description 3.1 Physical Layer Compatibility Since the LIN physical layer is independent from higher LIN layers (e.g., LIN protocol layer), all nodes with a LIN physical layer according to revision 2.x can be mixed with LIN physical layer nodes, which are according to older versions (i.e., LIN 1.0, LIN 1.1, LIN 1.2, LIN 1.3) without any restrictions. 3.2 Supply Pin (VS) LIN operating voltage is VS = 5V to 27V.
PAGE 4
3.7 Input/Output (TXD) In Normal Mode the TXD pin is the microcontroller interface to control the state of the LIN output. TXD must be pulled to ground in order to drive the LIN bus low. If TXD is high or unconnected (internal pull-up resistor), the LIN output transistor is turned off and the bus is in the recessive state. During Fail-safe Mode, this pin is used as output and is signalling the fail-safe source. 3.8 Dominant Time-out Function (TXD) The TXD input has an internal pull-up resistor.
PAGE 5
ATA6629/ATA6631 4. Mode of Operation Figure 4-1. Mode of Operation a: VS > VSthF Unpowered Mode (See section 4.5) b b: VS < VSthU c: Bus wake-up event d: NRES switches to low a Fail-safe Mode b b VCC: 3.3V/5V/50 mA with undervoltage monitoring Communication: OFF d EN = 1 c+d EN = 1 c Go to silent command b EN = 0 Silent Mode TXD = 1 Local wake-up event Normal Mode EN = 1 VCC: 3.3V/5V/50 mA with undervoltage monitoring VCC: 3.
PAGE 6
4.1 Normal Mode This is the normal transmitting and receiving mode of the LIN Interface, in accordance with LIN specification 2.x. The VCC voltage regulator operates with a 3.3V/5V output voltage, with a low tolerance of ±2% and a maximum output current of 50 mA. If an undervoltage condition occurs, NRES is switched to low and the IC changes its state to Fail-safe Mode. 4.2 Silent Mode A falling edge at EN while TXD is high switches the IC into Silent Mode.
PAGE 7
ATA6629/ATA6631 A voltage less than the LIN Pre-wake detection V LINL at pin LIN activates the internal LIN receiver and starts the wake-up detection timer. A falling edge at the LIN pin followed by a dominant bus level maintained for a certain time period (tbus) and the following rising edge at pin LIN (see Figure 4-3 on page 7) results in a remote wake-up request. The device switches from Silent Mode to Fail-safe Mode, then the internal LIN slave termination resistor is switched on.
PAGE 8
4.3 Sleep Mode A falling edge at EN while TXD is low switches the IC into Sleep Mode. The TXD Signal has to be logic low during the Mode Select window (Figure 4-5 on page 9). Figure 4-4. Switch to Sleep Mode Sleep Mode Normal Mode EN Mode select window TXD td = 3.2 µs NRES VCC Delay time sleep mode td_sleep = maximum 20 µs LIN LIN switches directly to recessive mode In order to avoid any influence to the LIN-pin during switching into sleep mode it is possible to switch the EN up to 3.
PAGE 9
ATA6629/ATA6631 A voltage less than the LIN Pre-wake detection V LINL at pin LIN activates the internal LIN receiver and starts the wake-up detection timer. A falling edge at the LIN pin followed by a dominant bus level maintained for a certain time period (tbus) and a following rising edge at pin LIN results in a remote wake-up request. The device switches from Sleep Mode to Fail-safe Mode. The VCC regulator is activated, and the internal LIN slave termination resistor is switched on.
PAGE 10
4.4 Sleep or Silent Mode: Behavior at a Floating LIN-bus or a Short Circuited LIN to GND In Sleep or in Silent Mode the device has a very low current consumption even during shortcircuits or floating conditions on the bus. A floating bus can arise if the Master pull-up resistor is missing, e.g., if it is switched off when the LIN- Master is in sleep mode or even if the power supply of the Master node is switched off.
PAGE 11
ATA6629/ATA6631 Figure 4-7. Short Circuit to GND on the LIN bus During Sleep- or Silent Mode LIN Pre-wake VLINL LIN BUS LIN dominant state VBUSdom tmon tmon IVS Mode of operation IVSsleep/silent + ILINwake Wake-up Detection Phase Sleep/Silent Mode IVSsleep/silent Sleep/Silent Mode Int. Pull-up Resistor RLIN 4.5 IVSfail off (disabled) Fail-Safe Mode on (enabled) Fail-safe Mode The device automatically switches to Fail-safe Mode at system power-up.
PAGE 12
A wake-up event from either Silent or Sleep Mode will be signalled to the microcontroller using the two pins RXD and TXD. The coding is shown in Table 4-3. A wake-up event will lead the IC to the Fail-safe Mode. Table 4-3. Signalling Fail-safe Sources Fail-safe Sources 4.
PAGE 13
ATA6629/ATA6631 5. Fail-safe Features • During a short-circuit at LIN to VBattery , the output limits the output current to IBUS_LIM. Due to the power dissipation, the chip temperature exceeds TLINoff and the LIN output is switched off. The chip cools down and after a hysteresis of Thys, switches the output on again. RXD stays on high because LIN is high. During LIN overtemperature switch-off, the VCC regulator is working independently.
PAGE 14
6. Voltage Regulator Figure 6-1. VCC Voltage Regulator: Ramp Up and Undervoltage VS 12V 5.5V/3.8V VCC 5V/3.3V Vthun tVCC tReset tres_f NRES 5V/3.3V The voltage regulator needs an external capacitor for compensation and to smooth the disturbances from the microcontroller. It is recommended to use an electrolytic capacitor with C > 1.8 µF and a ceramic capacitor with C = 100 nF. The values of these capacitors can be varied by the customer, depending on the application.
PAGE 15
ATA6629/ATA6631 Figure 6-2. Power Dissipation: Save Operating Area versus VCC Output Current and Supply Voltage VS at Different Ambient Temperatures Due to Rthja = 80 K/W 60.00 Tamb = 85°C 50.00 Tamb = 95°C IVCC (mA) 40.00 Tamb = 105°C 30.00 20.00 10.00 0.
PAGE 16
7. Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Parameters Symbol Min. Supply voltage VS VS –0.
PAGE 17
ATA6629/ATA6631 9. Electrical Characteristics 5V < VS < 27V, –40°C < Tj < 150°C; unless otherwise specified all values refer to GND pins. No. Pin Symbol Min. Typ. Max. Unit Type* VS VS 5 13.5 27 V A Sleep Mode VLIN > VS – 0.5V VS < 14V (Tj = 25°C) VS IVSsleep 3 10 14 µA A Sleep Mode VLIN > VS – 0.
PAGE 18
9. Electrical Characteristics (Continued) 5V < VS < 27V, –40°C < Tj < 150°C; unless otherwise specified all values refer to GND pins. No. Parameters Test Conditions Pin Symbol Min. 3.4 High level leakage current VTXD = VCC TXD ITXD –3 3.5 Fail-safe Mode Low level output sink VLIN = VS current at local wake-up VWAKE = 0V request VTXD = 0.4V TXD ITXDwake 2 4 Typ. 2.5 Max. Unit Type* +3 µA A 8 mA A EN Input Pin 4.1 Low level voltage input EN VENL –0.3 +0.8 V A 4.
PAGE 19
ATA6629/ATA6631 9. Electrical Characteristics (Continued) 5V < VS < 27V, –40°C < Tj < 150°C; unless otherwise specified all values refer to GND pins. No. Parameters Test Conditions Pin Symbol 6.12 Ramp up time VS > 4V to VCC = 3.3V CVCC = 2.2 µF Iload = –5 mA at VCC VCC tVCC 7 Min. Typ. Max. Unit Type* 100 250 µs A VCC Voltage Regulator ATA6631 7.1 Output voltage VCC 5.5V < VS < 18V (0 mA to 50 mA) VCC VCCnor 4.9 5.1 V A 7.2 Output voltage VCC at low VS 4V < VS < 5.
PAGE 20
9. Electrical Characteristics (Continued) 5V < VS < 27V, –40°C < Tj < 150°C; unless otherwise specified all values refer to GND pins. No. Parameters 8.8 LIN current limitation VBUS = VBatt_max 8.9 Input leakage current at the receiver including pull-up resistor as specified Test Conditions Pin Symbol Min. Typ. Max. Unit Type* LIN IBUS_LIM 40 120 200 mA A Input Leakage current Driver off VBUS = 0V VBatt = 12V LIN IBUS_PAS_dom –1 –0.35 mA A 8.
PAGE 21
ATA6629/ATA6631 9. Electrical Characteristics (Continued) 5V < VS < 27V, –40°C < Tj < 150°C; unless otherwise specified all values refer to GND pins. No. Parameters Test Conditions Pin Symbol Min. Typ. Max. Unit Type* 10.4 TXD dominant time out timer VTXD = 0V TXD tdom 27 55 70 ms A 10.5 Monitoring time for wake-up over LIN bus LIN tmon 6 10 15 ms A 10.
PAGE 22
Figure 9-1.
PAGE 23
ATA6629/ATA6631 Figure 9-2. Application Circuit VCC 1 ATA6629/31 VBAT VS VCC + 5 kΩ RXD 5 Normal and Fail-safe Mode Receiver + 100 nF 4 22 µF LIN-BUS LIN RF filter 220 pF VCC Microcontroller Wake-up bus timer TXD EN 6 TXD Time-out timer Slew rate control 2 Control unit GND 3 Short circuit and overtemperature protection Sleep mode VCC switched off Normal Mode and Silent mode 3.
PAGE 24
10. Ordering Information Extended Type Number Package ATA6629-TAPY Remarks SO8 3.3V LIN system basis chip, Pb-free, 1k, taped and reeled ATA6631-TAPY SO8 5V LIN system basis chip, Pb-free, 1k, taped and reeled ATA6629-TAQY SO8 3.3V LIN system basis chip, Pb-free, 4k, taped and reeled ATA6631-TAQY SO8 5V LIN system basis chip, Pb-free, 4k, taped and reeled 11. Package Information Package: SO 8 Dimensions in mm 5±0.2 4.9±0.1 0.1+0.15 1.4 0.2 3.7±0.1 0.4 1.27 3.8±0.1 6±0.2 3.
PAGE 25
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