Instruction Manual

1
Features
• Next Generation Equivalent of ATF20V8B (ATF20V8BQ, ATF22V10BQC)
• Complimentary Easy-to-use Atmel-WinCUPL Design Software
• “Z” Zero Power Compared to “L” Low Power
• Edge-sensing Zero Standby Power (10 µA Typical) (CQZ)
• Pin-controlled Zero Standby Power (10 µA Typical) Option (C, CQ)
• User-controlled Power-down Pin (C, CQ)
• High-speed Electrically Erasable Programmable Logic Devices
– 5 ns Maximum Pin-to-pin Delay (C)
• CMOS and TTL Compatible Inputs and Outputs
– Pin-keeper Feature Holds Inputs and I/Os to Previous Logic States
– PCI Compliant
• High-reliability EE Process
– 20 Year Data Retention
– 100 Erase/Write Cycles
– 2,000V ESD Protection
– 200 mA Latch-up Immunity
• Commercial and Industrial Temperature Ranges
AT20V8C Family
High-
performance
EE PLD
ATF20V8C
ATF20V8CQ
ATF20V8CQZ
Rev. 0408H–04/01
Pin Configurations
All Pinouts Top View
Pin Name Function
CLK Clock
IN Logic Inputs
I/O Bi-directional Buffers
OE
Output Enable
NC No Internal Connection
VCC +5V Supply
PD Power-down
TSSOP
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
CLK/IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
GND
VCC
IN
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
OE/IN
(1)
PD/
PLCC
5
6
7
8
9
10
11
25
24
23
22
21
20
19
(1)
PD/IN
IN
IN
NC
IN
IN
IN
I/O
I/O
I/O
NC
I/O
I/O
I/O
4 3 2 1
28 27 26
12 13 14 15 16 17 18
IN IN
GND
NC
OE/IN
IN
I/O
IN IN CLK/IN NC VCC IN I/O
DIP/SOIC
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
CLK/IN
IN
IN
(1)
PD/IN
IN
IN
IN
IN
IN
IN
IN
GND
VCC
IN
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
OE/IN
Note: 1. PD on C and CQ only.