Owner manual

1
Note: For ATV2500BQ and
ATV2500BQL (PLCC/LCC
package only) pin 4 and
pin 26 connections are not
required.
Pin Configurations
Pin Name Function
IN Logic Inputs
CLK/IN Pin Clock and
Input
I/O Bi-directional
Buffers
I/O 0,2,4.. “Even” I/O Buffers
I/O 1,3,5.. “Odd” I/O Buffers
GND Ground
VCC +5V Supply
Features
High-performance, High-density Programmable Logic Device
Typical 7 ns Pin-to-pin Delay
Fully Connected Logic Array with 416 Product Terms
Flexible Output Macrocell
48 Flip-flops – Two per Macrocell
–72 Sum Terms
All Flip-flops, I/O Pins Feed in Independently
Achieves Over 80% Gate Utilization
Enhanced Macrocell Configuration Selections
D- or T-type Flip-flops
Product Term or Direct Input Pin Clocking
Registered or Combinatorial Internal Feedback
Several Power Saving Options
Backward Compatible with ATV2500H/L Software
Proven and Reliable High-speed UV EPROM Process
Reprogrammable – Tested 100% for Programmability
40-lead Dual-in-line and 44-lead Surface Mount Packages
Block Diagram
Device I
CC
, Standby
ATV2500B 110 mA
ATV2500BQ 30 mA
ATV2500BL 2 mA
ATV2500BQL 2 mA
Rev. 0249J–05/00
High-speed
High-density
UV-erasable
Programmable
Logic Device
ATV2500B
ATV2500BQ
ATV2500BQL
LCC/PLCC
7
8
9
10
11
12
13
14
15
16
17
39
38
37
36
35
34
33
32
31
30
29
I/O2
I/O3
I/O4
I/O5
VCC
VCC
I/O17
I/O16
I/O15
I/O14
I/O13
I/O7
I/O8
I/O9
I/O10
I/O11
GND
GND
I/O23
I/O22
I/O21
I/O20
6
5
4
3
2
1
44
43
42
41
40
18
19
20
21
22
23
24
25
26
27
28
I/O12
IN
IN
IN
IN
IN
IN
IN
GND
I/O18
I/O19
I/O1
I/O0
GND
IN
IN
CLK/IN
IN
IN
IN
IN
I/O06
DIP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
CLK/IN
IN
IN
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
VCC
I/O17
I/O16
I/O15
I/O14
I/O13
I/O12
IN
IN
IN
IN
IN
IN
IN
IN
I/O6
I/O7
I/O8
I/O9
I/O10
I/O11
GND
I/O23
I/O22
I/O21
I/O20
I/O19
I/O18
IN
IN
IN

Summary of content (21 pages)