User Manual

Functional Description (Continued)

TL/H/5671–26

Note 1: Numbers in parentheses refer to MC6800 CPU pin out.

Note 2: Numbers of letters in brackets refer to standard M6800 system common bus code.

FIGURE 16. Interfacing Multiple A/Ds in an MC6800 System

SAMPLE PROGRAM FOR

FIGURE 16

INTERFACING MULTIPLE A/Ds IN AN MC6800 SYSTEM

ADDRESS HEX CODE MNEMONICS COMMENTS

0010 DF 44 DATAIN STX TEMP ; Save Contents of X

0012 CE 00 2A LDX #$002A ; Upon IRQ

LOW CPU

0015 FF FF F8 STX $FFF8 ; Jumps to 002A

0018 B7 50 00 STAA $5000 ; Starts all A/D’s

001B 0E CLI

001C 3E WAI ; Wait for interrupt

001D CE 50 00 LDX #$5000

0020 DF 40 STX INDEX1 ; Reset both INDEX

0022 CE 02 00 LDX #$0200 ; 1 and 2 to starting

0025 DF 42 STX INDEX2 ; addresses

0027 DE 44 LDX TEMP

0029 39 RTS ; Return from subroutine

002A DE 40 INTRPT LDX INDEX1 ; INDEX1

002C A6 00 LDAA X ; Read data in from A/D at X

002E 08 INX ; Increment X by one

002F DF 40 STX INDEX1 ; X

INDEX1

0031 DE 42 LDX INDEX2 ; INDEX2