User Manual

TL/H/5671–29

FIGURE 21. Multiple A/Ds with Z-80 Type Microprocessor

INTERRUPT SERVICING SUBROUTINE

SOURCE

LOC OBJ CODE STATEMENT COMMENT

0038 E5 PUSH HL ; Save contents of all registers affected by

0039 C5 PUSH BC ; this subroutine.

003A F5 PUSH AF ; Assumed INT mode 1 earlier set.

003B 21 00 3E LD (HL),X3E00 ; Initialize memory pointer where data will be stored.

003E 0E 01 LD C, X01 ; C register will be port ADDR of A/D converters.

0040 D300 OUT X00, A ; Load peripheral status word into 8-bit latch.

0042 DB00 IN A, X00 ; Load status word into accumulator.

0044 47 LD B,A ; Save the status word.

0045 79 TEST LD A,C ; Test to see if the status of all A/D’s have

0046 FE 08 CP, X08 ; been checked. If so, exit subroutine

0048 CA 60 00 JPZ, DONE

004B 78 LD A,B ; Test a single bit in status word by looking for

004C 1F RRA ; a ‘1‘ to be rotated into the CARRY (an INT

004D 47 LD B,A ; is loaded as a ‘1‘). If CARRY is set then load

004E DA 5500 JPC, LOAD ; contents of A/D at port ADDR in C register.

0051 0C NEXT INC C ; If CARRY is not set, increment C register to point

0052 C3 4500 JP,TEST ; to next A/D, then test next bit in status word.

0055 ED 78 LOAD IN A, (C) ; Read data from interrupting A/D and invert

0057 EE FF XOR FF ; the data.

0059 77 LD (HL),A ; Store the data

005A 2C INC L

005B 71 LD (HL),C ; Store A/D identifier (A/D port ADDR).

005C 2C INC L

005D C3 51 00 JP,NEXT ; Test next bit in status word.

0060 F1 DONE POP AF ; Re-establish all registers as they were

0061 C1 POP BC ; before the interrupt.

0062 E1 POP HL

0063 C9 RET ; Return to original program