User Manual

TRI-STATE Test Circuits and Waveforms
t
1H
t
1H
,C
L
e
10 pF
t
r
e
20 ns
t
0H
t
0H
,C
L
e
10 pF
t
r
e
20 ns
TL/H/5671–3
Timing Diagrams (All timing is measured from the 50% voltage points)
Output Enable and Reset INTR
Note: Read strobe must occur 8 clock periods (8/f
CLK
) after assertion of interrupt to guarantee reset of INTR.
TL/H/5671–4
5