User Manual

Copyright 1995 by Dallas Semiconductor Corporation.
All Rights Reserved. For important information regarding
patents and other intellectual property rights, please refer to
Dallas Semiconductor data books.
DS1220Y
16K Nonvolatile SRAM
DS1220Y
091295 1/8
FEATURES
10 years minimum data retention in the absence of
external power
Data is automatically protected during power loss
Directly replaces 2K x 8 volatile static RAM or
EEPROM
Unlimited write cycles
Low-power CMOS
JEDEC standard 24–pin DIP package
Read and write access times as fast as 100 ns
Full + 10% operating range
Optional industrial temperature range of -40°C to
+85°C, designated IND
PIN ASSIGNMENT
1
2
3
4
5
6
7
8
9
10
11
12 13
14
15
16
17
18
19
20
21
22
23
24
A8
A9
A10
DQ7
DQ6
DQ5
DQ4
DQ3
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
CE
OE
WE
V
CC
24–PIN ENCAPSULATED PACKAGE
720 MIL EXTENDED
PIN DESCRIPTION
A
0
-A
10
Address Inputs
DQ
0
-DQ
7
Data In/Data Out
CE
Chip Enable
WE
Write Enable
OE
Output Enable
V
CC
Power (+5V)
GND Ground
DESCRIPTION
The DS1220Y 16K Nonvolatile SRAM is a 16,384-bit,
fully static, nonvolatile RAM organized as 2048 words
by 8 bits. Each NV SRAM has a self-contained lithium
energy source and control circuitry which constantly
monitors V
CC
for an out-of-tolerance condition. When
such a condition occurs, the lithium energy source is
automatically switched on and write protection is uncon-
ditionally enabled to prevent data corruption. The NV
SRAM can be used in place of existing 2K x 8 SRAMs
directly conforming to the popular bytewide 24-pin DIP
standard. The DS1220Y also matches the pinout of the
2716 EPROM or the 2816 EEPROM, allowing direct
substitution while enhancing performance. There is no
limit on the number of write cycles that can be executed
and no additional support circuitry is required for micro-
processor interfacing.

Summary of content (8 pages)