DS1685/DS1687 3V/5V Real-Time Clock www.maxim-ic.com www.maxim-ic.com FEATURES PIN ASSIGNMENT (Top View) Incorporates industry-standard DS1287 PC clock plus enhanced features: § Y2K-compliant § +3 or +5V operation § 64-bit silicon serial number § Power-control circuitry supports system power-on from date/time alarm or key closure § 32kHz output for power management § Crystal-select bit allows RTC to operate with 6pF or 12.
DS1685/DS1687 ORDERING INFORMATION PART DS1685-3 DS1685-5 DS1685-5IND DS1685E-3 DS1685E-5 DS1685EN-3 DS1685EN-5 DS1685E-3/T&R DS1685E-5/T&R DS1685EN-3/T&R DS1685EN-5/T&R DS1685Q-3 DS1685Q-5 DS1685QN-3 DS1685QN-5 DS1685QN-5/T&R DS1685Q-3/T&R DS1685Q-5/T&R DS1685S-3 DS1685S-5 DS1685SN-3 DS1685SN-5 DS1685SN-5/T&R DS1685S-3/T&R DS1685S-5/T&R DS1687-3 DS1687-5 DS1687-3IND DS1687-5IND PIN-PACKAGE 24 DIP 24 DIP 24 DIP 24 TSSOP 24 TSSOP 24 TSSOP 24 TSSOP 24 TSSOP/ Tape and Reel 24 TSSOP/ Tape and Reel 24 TSSOP/ T
DS1685/DS1687 TYPICAL OPERATING CIRCUIT DESCRIPTION The DS1685/DS1687 is a real-time clock (RTC) designed as a successor to the industry-standard DS1285, DS1385, DS1485, and DS1585 PC RTCs. This device provides the industry-standard DS1285 clock function with either +3.0V or +5.0V operation. The DS1685 also incorporates a number of enhanced features including a silicon serial number, power-on/off control circuitry, 242 bytes of user NV SRAM, and 32.768kHz output for sustaining power management activities.
DS1685/DS1687 SIGNAL DESCRIPTIONS GND, VCC – DC power is provided to the device on these pins. VCC is the +3V or +5V input. SQW (Square-Wave Output) - The SQW pin provides a 32kHz square-wave output, tREC, after a powerup condition has been detected. This condition sets the following bits, enabling the 32kHz output; DV1 = 1, and E32K = 1. A square wave is output on this pin if either SQWE = 1 or E32K = 1. If E32K = 1, then 32kHz is output regardless of the other control bits.
DS1685/DS1687 set. To clear the IRQ pin, the application software must clear all enabled flag bits contributing to IRQ ’s active state. When no interrupt conditions are present, the IRQ level is in the high-impedance state. Multiple interrupting devices can be connected to an IRQ bus. The IRQ pin is an open-drain output and requires an external pullup resistor. The voltage on the pullup supply should be no greater than VCC + 0.2V.
DS1685/DS1687 VBAT – Battery input for any standard 3V lithium cell or other energy source. Battery voltage must be held between 2.5V and 3.7V for proper operation. VBAT must be grounded if not used. Diodes should not be placed between VBAT and the battery. N.C. – No Connection. See “Conditions of Acceptability” at http://www.maxim-ic.com/TechSupport/QA/ntrl.
DS1685/DS1687 Figure 1.
DS1685/DS1687 OSCILLATOR STARTUP TIME Oscillator startup times are highly dependent upon crystal characteristics and layout. High ESR and excessive capacitive loads are the major contributors to long startup times. A circuit using a crystal with the recommended characteristics and following the recommended layout usually starts within one second.
DS1685/DS1687 POWER-DOWN/POWER-UP CONSIDERATIONS The RTC function continues to operate, and all of the RAM, time, calendar, and alarm memory locations remain nonvolatile regardless of the level of the VCC input. When VCC is applied to the DS1685/DS1687 and reaches a level of greater than VPF (power-fail trip point), the device becomes accessible after tREC, provided that the oscillator is running and the oscillator countdown chain is not in reset (Register A).
DS1685/DS1687 0 13 14 63 CLOCK/ CALENDAR 14 BYTES 50 BYTES USER RAM 64 00H 0 SECONDS 1 SECONDS ALARM 0DH 2 MINUTES 0EH 3 MINUTES ALARM 03FH 4 HOURS 040H 5 HOURS ALARM 6 DAY OF THE WEEK 7 DAY OF THE MONTH 8 MONTH 9 YEAR 10 REGISTER A 11 REGISTER B 12 REGISTER C 13 REGISTER D BANK0, BANK 1 REGISTERS, RAM 127 07FH BINARY OR BCD INPUTS Figure 2.
DS1685/DS1687 generated each hour when the “don’t care” bits are set in the hours byte. Similarly, an alarm is generated every minute with “don’t care” codes in the hours and minute alarm bytes. The “don’t care” codes in all three time alarm bytes create an interrupt every second. The three time-alarm bytes can be used with the date alarm as described in the Wake-Up/Kickstart section. The century counter is discussed later in this text. Table 1.
DS1685/DS1687 CONTROL REGISTERS The four control registers A, B, C, and D reside in both bank 0 and bank 1. These registers are accessible at all times, even during the update cycle. REGISTER A MSB BIT 7 UIP BIT 6 DV2 BIT 5 DV1 BIT 4 DV0 BIT 3 RS3 BIT 2 RS2 BIT 1 RS1 LSB BIT 0 RS0 UIP – The update-in-progress (UIP) bit is a status flag that can be monitored. When the UIP bit is a 1, the update transfer occurs soon. When UIP is a 0, the update transfer does not occur for at least 244ms.
DS1685/DS1687 REGISTER B MSB BIT 7 SET BIT 6 PIE BIT 5 AIE BIT 4 UIE BIT 3 SQWE BIT 2 DM BIT 1 24/12 LSB BIT 0 DSE SET – When the SET bit is a 0, the update transfer functions normally by advancing the counts once per second. When the SET bit is written to a 1, any update transfer is inhibited and the program can initialize the time and calendar bytes without an update occurring in the midst of initializing. Read cycles can be executed in a similar manner.
DS1685/DS1687 REGISTER C MSB BIT 7 IQRF BIT 6 PF BIT 5 AF BIT 4 UF BIT 3 0 BIT 2 0 BIT 1 0 LSB BIT 0 0 IRQF – The interrupt-request flag (IRQF) bit is set to a 1 when one or more of the following are true: PF = PIE = 1 AF = AIE = 1 UF = UIE = 1 WF = WIE= 1 KF = KSE= 1 RF = RIE = 1 i.e., IRQF = (PF x PIE) + (AF x AIE) + (UF x UIE) + (WF x WIE) + (KF x KSE) + (RF x RIE) Any time the IRQF bit is a 1, the IRQ pin is driven low.
DS1685/DS1687 NV RAM—RTC The 242 general-purpose NV RAM bytes are not dedicated to any special function within the DS1685/DS1687. They can be used by the application program as nonvolatile memory and are fully available during the update cycle. The user RAM is divided into two separate memory banks. When the bank 0 is selected, the 14 RTC registers and 114 bytes of user RAM are accessible.
DS1685/DS1687 When using the flag bits with fully enabled interrupts, the IRQ line is driven low when an interrupt flag bit is set and its corresponding enable bit is also set. IRQ is held low as long as at least one of the six possible interrupt sources has its flag and enable bits both set. The IRQF bit in Register C is a 1 whenever the IRQ pin is being driven low as a result of one of the six possible active sources.
DS1685/DS1687 Register B. The periodic interrupt can be used with software counters to measure inputs, create output intervals, or await the next needed software function. Table 2. PERIODIC INTERRUPT RATE AND SQUARE-WAVE OUTPUT FREQUENCY EXT. E32K 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 SELECT BITS REGISTER A RS3 RS2 RS1 RS0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 1 0 1 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 X X X X tPI PERIODIC INTERRUPT RATE None 3.90625ms 7.
DS1685/DS1687 UPDATE CYCLE The serialized RTC executes an update cycle once per second regardless of the SET bit in Register B. When the SET bit in Register B is set to 1, the user copy of the double-buffered time, calendar, alarm, and elapsed time byte is frozen and does not update as the time increments. However, the time countdown chain continues to update the internal copy of the buffer.
DS1685/DS1687 EXTENDED FUNCTIONS The extended functions provided by the DS1685/DS1687 that are new to the RAMified RTC family are accessed by a software-controlled bank-switching scheme, as illustrated in Figure 4. In bank 0, the clock/calendar registers and 50 bytes of user RAM are in the same locations as for the DS1287. As a result, existing routines implemented within BIOS, DOS, or application software packages can gain access to the DS1685/DS1687 clock registers with no changes.
DS1685/DS1687 AUXILIARY BATTERY The VBAUX input is provided to supply power from an auxiliary battery for the DS1685/DS1687 kickstart, wake-up, and SQW output features in the absence of VCC. This power source must be available in order to use these auxiliary features when no VCC is applied to the device. The auxiliary-battery enable (ABE; bank 1, register 04BH) bit in extended control register B is used to turn on and off the auxiliary battery for the above functions in the absence of VCC.
DS1685/DS1687 Up/Kickstart Timing Diagram” in the Electrical Specifications section of this data sheet. The timing associated with these functions is divided into five intervals, labeled 1 to 5 on the diagram. The occurrence of either a kickstart or wake-up condition causes the PWR pin to be driven low, as described above.
DS1685/DS1687 The RAM clear function is enabled or disabled by the RAM clear-enable bit (RCE; bank 1, register 04BH). When this bit is set to a logic 1, the 242 bytes of user RAM is cleared (all bits set to 1) when an active-low transition is sensed on the RCLR pin. This action has no affect on either the clock/calendar settings or upon the contents of the extended RAM. The RAM clear flag (RF, bank 1, register 04AH) is set when the RAM clear operation has been completed.
DS1685/DS1687 Figure 4.
DS1685/DS1687 EXTENDED CONTROL REGISTERS Two extended control registers are provided to supply controls and status information for the extended features offered by the DS1685/DS1687. These are designated as extended control registers A and B and are located in register bank 1, locations 04AH and 04BH, respectively. The functions of the bits within these registers are described as follows.
DS1685/DS1687 EXTENDED CONTROL REGISTER 4B MSB BIT 7 ABE BIT 6 E32K BIT 5 CS BIT 4 RCE BIT 3 PRS BIT 2 RIE BIT 1 WIE LSB BIT 0 KSE ABE – Auxiliary Battery Enable. This bit when written to a logic 1 enables the VBAUX pin for extended functions. E32K – Enable 32.768kHz output. This bit when written to a logic 1 enables the 32.768kHz oscillator frequency to be output on the SQW pin. CS – Crystal Select Bit.
DS1685/DS1687 SYSTEM MAINTENANCE INTERRUPT (SMI) RECOVERY STACK An SMI recovery register stack is located in the extended register bank, locations 4Eh and 4Fh. This register stack, shown below, can be used by the BIOS to recover from an SMI occurring during an RTC read or write.
DS1685/DS1687 ABSOLUTE MAXIMUM RATINGS* Voltage Range on Any Pin Relative to Ground Operating Temperature Range, Commercial Operating Temperature Range, Industrial Storage Temperature Range Soldering Temperature 0.3V to +6V 0°C to +70°C -40°C to +85°C -40°C to +85°C See IPC/JEDEC J-STD-020A (Note 12) *This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operation sections of this specification is not implied.
DS1685/DS1687 DC ELECTRICAL CHARACTERISTICS (VCC = 5.0V±10%, TA = 0°C to +70°C, -40°C to +85°C) PARAMETER SYMBOL Average VCC Power-Supply Current CMOS Standby Current ( CS = VCC - 0.2V) MIN TYP MAX UNITS NOTES ICC1 7 15 mA 2, 3 ICC2 1 3 mA 2, 3 Input Leakage Current (Any Input) IIL -1 +1 mA Output Leakage Current IOL -1 +1 mA Output Logic 1 Voltage (IOUT = -1.0mA) VOH 2.4 Output Logic 0 Voltage (IOUT = +2.
DS1685/DS1687 DC ELECTRICAL CHARACTERISTICS (VCC = 3.0V±10%, TA = 0°C to +70°C, -40°C to +85°C) PARAMETER SYMBOL Average VCC Power-Supply Current CMOS Standby Current ( CS = VCC - 0.2V) MIN TYP MAX UNITS NOTES ICC1 5 10 mA 2, 3 ICC2 0.5 2 mA 2, 3 Input Leakage Current (Any Input) IIL -1 +1 mA Output Leakage Current IOL -1 +1 mA Output Logic 1 Voltage at = -0.4mA VOH 2.4 Output Logic 0 Voltage at = +0.
DS1685/DS1687 RTC AC TIMING CHARACTERISTICS (VCC = 3.
DS1685/DS1687 RTC AC TIMING CHARACTERISTICS (VCC = 5.
DS1685/DS1687 DS1685/DS1667 BUS TIMING FOR READ CYCLE TO RTC AND RTC REGISTERS DS1685/DS1687 BUS TIMING FOR WRITE CYCLE TO RTC AND RTC REGISTERS 32 of 38
DS1685/DS1687 POWER-UP/DOWN TIMING, 5V PARAMETER SYMBOL High to Power-Fail tPF Recovery at Power-Up tREC CS (TA = +25°C) MIN TYP MAX UNITS 0 ns 150 ms VCC Slew Rate Power-Down tF 4.0 £ VCC £ 4.5V 300 ms VCC Slew Rate Power-Down tFB 3.0 £ VCC £ 4.0V 10 ms VCC Slew Rate Power-Up tR 4.5V ³ VCC ³ 4.0V 0 ms Expected Data Retention tDR 10 years POWER-UP/DOWN TIMING, 3V PARAMETER tPF Recovery at Power-Up tREC MIN TYP MAX UNITS 0 ns 150 NOTES ms tF 2.6 £ VCC £ 2.
DS1685/DS1687 POWER-UP CONDITION, 3V CS VIH tREC 2.7V 2.6V 2.5V VCC tR POWER FAIL POWER-DOWN CONDITION, 3V CS VIH tPF tF VCC 2.7V 2.6V 2.
DS1685/DS1687 POWER-UP CONDITION, 5V CS VIH tREC 4.5V 4.25V 4.0V VCC tR POWER FAIL POWER-DOWN CONDITION, 5V CS VIH tPF tF VCC 4.5V 4.25V 4.
DS1685/DS1687 WAKE-UP/KICKSTART TIMING *This condition can occur with the 3V device. Note: Time intervals shown above are referenced in Wake-Up/Kickstart section.
DS1685/DS1687 NOTES: 1) 2) 3) 4) 5) 6) 7) 8) All voltages are referenced to ground. Typical values are at +25°C and nominal supplies. Outputs are open. Write-protection trip point occurs during power-fail prior to switchover from VCC to VBAT. Applies to the AD0–AD7 pins and the SQW pin when each is in a high-impedance state. The IRQ and PWR pins are open-drain outputs. Measured with a load of 50pF + 1 TTL gate.
DS1685/DS1687 DS1687 REAL-TIME CLOCK PLUS RAM Note: Pins 2, 3, 16, and 20 are missing by design. 24-PIN PACKAGE DIM MIN MAX A IN. MM B IN. MM C IN. MM D IN. MM E IN. MM F IN. MM G IN. MM H IN. MM J IN. MM K IN. MM 1.320 33.53 0.720 18.29 0.345 8.76 0.100 2.54 0.015 0.38 0.110 2.79 0.090 2.29 0.590 14.99 0.008 0.20 0.015 0.38 1.335 33.91 0.740 18.80 0.370 9.40 0.130 3.30 0.030 0.76 0.140 3.56 0.110 2.79 0.630 16.00 0.012 0.30 0.021 0.
