Instruction Manual

DS2406
5 of 31
MEMORY MAP
The DS2406 has two memory sections, called data memory and status memory. The data memory
consists of 1024 bits of one-time programmable EPROM organized as 4 pages of 32 bytes each. The
address range of the device’s status memory is 8 bytes. The first seven bytes of status memory (addresses
0 to 6) are implemented as EPROM. The eighth byte (address 7) consists of static RAM. The complete
memory map is shown in Figure 5. The 8-bit scratchpad is an additional register that acts as a buffer when
writing the memory. Data is first written to the scratchpad and then verified by reading a 16-bit CRC
from the DS2406 that confirms proper receipt of the data and address. This process ensures data integrity
when programming the memory. If the buffer contents are correct, the bus master should transmit a
programming pulse (EPROM) or a dummy byte FFh (RAM) to transfer the data from the scratchpad to
the addressed memory location. The details for reading and programming the DS2406 are given in the
Memory Function Commands section.
DS2406 MEMORY MAP Figure 5
8-Bit Scratchpad
Page # Address Range Description
0 0000h to 001Fh 32-Byte final storage Data Memory
1 0020h to 003Fh 32-Byte final storage Data Memory
2 0040h to 005Fh 32-Byte final storage Data Memory
3 0060h to 007Fh 32-Byte final storage Data Memory
Valid Device
Settings
(SRAM)
00
Factory
Test Byte
Redirection
Bytes
Bitmap of
Used Pages
Write-Protect
Bits Data
Memory
DS2406 STATUS MEMORY MAP Figure 6
ADDRESS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
0 (EPROM) BM3 BM2 BM1 BM0 WP3 WP2 WP1 WP0
1 (EPROM)1 11111Redir. 0Redir. 0
2 (EPROM)1 11111Redir. 1Redir. 1
3 (EPROM)1 11111Redir 2Redir 2
4 (EPROM)1 11111Redir 3Redir 3
5 (EPROM) EPROM Factory Test byte
6 (EPROM) Don’t care, always reads 00
7 (SRAM) Supply
Indication
(read only)
PIO-B
Channel
Flip-flop
PIO-A
Channel
Flip-flop
CSS4
Channel
Select
CSS3
Channel
Select
CSS2
Source
Select
CSS1
Source
Select
CSS0
Polarity
1K-Bit
EPROM
8 Bytes
Status
Memor
y