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FEATURES

§ 15-Bit Bidirectional Current Measurement

(DS2740)

§ 1.56mV LSB and ±51.2mV Dynamic

Range

§ 78mA LSB and ±2.56A Dynamic

Range with External 20mW Sense

Resistor (R

SNS

)

§ 156mA LSB and ±5.12A Dynamic

Range with External 10mW Sense

Resistor (R

SNS

)

§ 13-Bit Bidirectional Current Measurement

(DS2740B)

§ 6.25mV LSB and ±51.2mV Dynamic

Range

§ 312mA LSB and ±2.56A Dynamic

Range with External 20mW Sense

Resistor (R

SNS

)

§ 625mA LSB and ±5.12A Dynamic

Range with External 10mW Sense

Resistor (R

SNS

)

§ Analog Input Filter (IS1, IS2) Extends

Dynamic Range for Pulse-Load

Applications

§ Current Accumulation Register

Resolution

§ 6.25mVhr (Both DS2740 and

DS2740B)

§ 0.3125mAhr with External 20mW

SNS

§ 0.6250mAhr with External 10mW

SNS

§ Dallas 1-Wire

Interface

§ Unique 64-Bit Device Address

§ Standard and Overdrive Timings

(OVD)

§ Low Power Consumption:

§ Active Current: 65mA max

§ Sleep Current: 1mA max

PIN CONFIGURATION

PIN DESCRIPTION

OVD- 1-Wire Bus Speed Select

PIO - Programmable I/O Pin

SNS - Sense Resistor Input

IS2 - Current-Sense Input

IS1 - Current-Sense Input

- Device Ground, Current-Sense Resistor

Return

DQ - Data Input/Output

- Power-Supply Input (2.7V to 5.5V)

DS2740

High-Precision Coulomb Counter

www.maxim-ic.com

MAX

(

DS2740U

DS2740BU

)

PIO

IS1IS2

SNS

See Table 1 for Ordering Information.

See Table 2 for Detailed Pin Descriptions.

1-Wire is a registered trademark of Dallas Semiconductor.

Summary of content (15 pages)

PAGE 1
DS2740 High-Precision Coulomb Counter www.maxim-ic.com FEATURES § § § § § § 15-Bit Bidirectional Current Measurement (DS2740) § 1.56mV LSB and ±51.2mV Dynamic Range § 78mA LSB and ±2.56A Dynamic Range with External 20mW Sense Resistor (RSNS) § 156mA LSB and ±5.12A Dynamic Range with External 10mW Sense Resistor (RSNS) 13-Bit Bidirectional Current Measurement (DS2740B) § 6.25mV LSB and ±51.2mV Dynamic Range § 312mA LSB and ±2.
PAGE 2
DS2740 Table 1. ORDERING INFORMATION PART DS2740U DS2740U/T&R DS2740BU DS2740BU/T&R MARKING DS2740 DS2740 DS2740B DS2740B PIN-PACKAGE 15-Bit Current Resolution, mMAX 15-Bit Current Resolution, mMAX, Tape-and-Reel 13-Bit Current Resolution, mMAX 13-Bit Current Resolution, mMAX, Tape-and-Reel DESCRIPTION The DS2740 provides high-precision current-flow measurement data to support battery-capacity monitoring in cost-sensitive applications.
PAGE 3
DS2740 Table 2. DETAILED PIN DESCRIPTION PIN SYMBOL DESCRIPTION OVD 1 1-Wire Bus Speed Control. Input logic level selects the speed of the 1Wire bus. Logic 1 selects overdrive (OVD) and Logic 0 selects standard timing (STD). On a multidrop bus, all devices must operate at same speed. PIO 2 Programmable I/O Pin. Programmed as input or output through internal registers. Open-drain output sufficient for LED or vibrator activation.
PAGE 4
DS2740 POWER MODES The DS2740 has two power modes: active and sleep. While in active mode, the DS2740 operates as a high-precision coulomb counter with current and accumulated current measurement blocks operating continuously and the resulting values updated in the measurement registers. Read and write access is allowed to all registers. PIO pin is active. In sleep mode, the DS2740 operates in a low-power mode with no current measurement activity.
PAGE 5
DS2740 PART CONVERSION TIME DS2740 DS2740B 3.515s 0.878s CURRENT RESOLUTION (1 LSB) RSNS VIS1 - VIS2 20mW 15mW 10mW 5mW 1.5625mV 78.13mA 104.2mA 156.3mA 312.5mA 1.250mA 6.250mV 312.5mA 416.7mA 625mA Every 1024th conversion, the ADC measures its input offset to facilitate offset correction. Offset correction occurs approximately once per hour in the DS2740 and four times per hour in the DS2740B. The resulting correction factor is applied to the subsequent 1023 measurements.
PAGE 6
DS2740 PART DS2740 DS2740B VIS1- VIS2 ±204.8mVh ACR RANGE RSNS 20mW 15mW 10mW ±10.24Ah ±13.65Ah ±20.48Ah 5mW ±40.96Ah MEMORY The DS2740 has memory space with registers for instrumentation, status, and control. When the MSB of a two-byte register is read, both the MSB and LSB are latched and held for the duration of the read data command to prevent updates during the read and ensure synchronization between the two register bytes.
PAGE 7
DS2740 SPECIAL FEATURE REGISTER The format of the special feature register is shown in Figure 6. The function of each bit is described in detail in the following paragraphs. Figure 6. SPECIAL FEATURE REGISTER FORMAT ADDRESS 08 BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 X PIO X X X X X X PIO—PIO Pin Sense and Control. This bit is read and write enabled. Writing a 0 to the PIO bit enables the PIO open-drain output driver, forcing the PIO pin low.
PAGE 8
DS2740 CRC is available in Application Note 27, Understanding and Using Cyclic Redundancy Checks with Dallas Semiconductor Touch Memory Products. (This application note can be found on the Maxim/Dallas Semiconductor website at www.maxim-ic.com.) In the circuit in Figure 8, the shift register bits are initialized to 0. Then, starting with the least significant bit of the family code, one bit at a time is shifted in. After the 8th bit of the family code has been entered, then the serial number is entered.
PAGE 9
DS2740 Figure 9. 1-WIRE BUS INTERFACE CIRCUITRY BUS MASTER Vpullup (2.0V to 5.5V) DS2740 1-WIRE PORT 4.7kW Rx Rx 1mA (typ) Tx Rx = RECEIVE Tx = TRANSMIT Tx 100W MOSFET TRANSACTION SEQUENCE The protocol for accessing the DS2740 through the 1-Wire port is as follows: § § § § Initialization Net Address Command Function Command Transaction/Data The sections that follow describe each of these steps in detail.
PAGE 10
DS2740 Skip Net Address [CCh]. This command saves time when there is only one DS2740 on the bus by allowing the bus master to issue a function command without specifying the address of the slave. If more than one slave device is present on the bus, a subsequent function command can cause a data collision when all slaves transmit data at the same time. Search Net Address [F0h].
PAGE 11
DS2740 Figure 10.
PAGE 12
DS2740 Table 4. FUNCTION COMMANDS COMMAND Read Data Write Data DESCRIPTION COMMAND PROTOCOL BUS STATE AFTER COMMAND PROTOCOL BUS DATA 69h, XX Master Rx Up to 256 bytes of data 6Ch, XX Master Tx Up to 256 bytes of data Reads data from memory starting at address XX Writes data to memory starting at address XX 1-WIRE SIGNALING The 1-Wire bus requires strict signaling protocols to ensure data integrity.
PAGE 13
DS2740 READ-TIME SLOTS A read-time slot is initiated when the bus master pulls the 1-Wire bus line from a logic-high level to a logic-low level. The bus master must keep the bus line low for at least 1ms and then release it to allow the DS2740 to present valid data. The bus master can then sample the data tRDV from the start of the readtime slot. By the end of the read-time slot, the DS2740 releases the bus line and allows it to be pulled high by the external pullup resistor.
PAGE 14
DS2740 ABSOLUTE MAXIMUM RATINGS* Voltage on VDD, DQ, IS1, IS2, PIO, Relative to VSS Voltage on SNS, Relative to VSS Operating Temperature Range Storage Temperature Range Soldering Temperature -0.3V to +6V -0.3V to +6V -40°C to +85°C -55°C to +125°C See IPC/JEDECJ-STD-020A * This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied.
PAGE 15
DS2740 Input Logic Low: DQ, PIO Output Logic Low: DQ, PIO DQ, PIO Input Pulldown Current OVD Input Leakage DQ Capacitance DQ Low to Sleep Time VIL (Note 1) 0.6 V VOL IOL = 4mA (Note 1) 0.4 V IPD ILOVD CDQ tSLEEP VDD = 4.2V, VDQ = 0.4V PIO bit = 1 -1 (Note 3) 2.0 mA 0.5 ELECTRICAL CHARACTERISTICS: 1-WIRE INTERFACE—STANDARD SPEED (2.7V £ VDD £ 5.5V; TA = -20°C to +70°C.