Manual

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Note: Some revisions of this device may incorporate deviations from published specifications known

as errata. Multiple revisions of any device may be simultaneously available through various sales

channels. For information about device errata, click here: http://dbserv.maxim-ic.com/errata.cfm

FEATURES

 Integrated transmit and receive for T3, E3,

and STS-1 line interfaces

 Performs clock/data recovery and wave

shaping

 Requires no special external components

other than 1:2 transformers

 Interfaces to 75Ω coaxial cable at lengths up

to 380m (T3), 440m (E3), or 360m (STS-1)

 Adaptive receive equalizer handles from 0dB

to 15dB of cable loss

 Interfaces directly to a DSX monitor signal

(20dB flat loss)

 On-chip jitter attenuator can be placed either

in the receive path or the transmit path

 Built-in B3ZS and HDB3 coder/decoder

 Bipolar and NRZ interfaces

 Analog and digital loopbacks

 Onboard 2

- 1 and 2

- 1 Pseudo Random

Bit Sequence (PRBS) generator and detector

 Transmit line-driver monitor checks for a

faulty transmitter or a shorted output

 Complete T3 AIS generator (ANSI T1.107)

 Unframed all ones generator (E3 AIS)

 Digital clock inversion capability

 Three-state line driver for low-power mode

 Loss-of-signal detector (ANSI T1.231-1999

and ITU G.775)

 Pin compatible with the TDK 78P7200 and

78P7200L

 Drop-in replacement for TDK 78P2241/B

(Refer to Application Note 362)

 Low-power 3.3V operation (5V tolerant I/O)

 Industrial temperature range: -40°C to +85°C

 Small packaging: 28-pin PLCC and

48-pin TQFP

FUNCTIONAL DIAGRAM

ORDERING INFORMATION

DS3150QN 28-Pin PLCC -40°C to +85°C

DS3150Q 28-Pin PLCC 0°C to +70°C

DS3150TN 48-Pin TQFP -40°C to +85°C

DS3150T 48-Pin TQFP 0°C to +70°C

PRELIMINARY

PRELIMINAR

Rx+

Rx-

Tx+

Tx-

RCL

RPOS

RNE

TCL

TPOS

TNEG

Line In

T3, E3,

-1

Line Ou

T3, E3,

-1

Receive

Clock and

Data

Transmit

Clock and

Data

DS3150 LIU

DS3150

3.3V T3/E3/STS-1 Line Interface Unit

www.maxim-ic.com

Summary of content (22 pages)

PAGE 1
PRELIMINARY PRELIMINARY DS3150 3.3V T3/E3/STS-1 Line Interface Unit www.maxim-ic.
PAGE 2
DS3150 TABLE OF CONTENTS 1. 2. 3. 4. 5. 6. FUNCTIONAL DESCRIPTION ……………………………………………………………..3 SIGNAL DESCRIPTION……………………………………………………………………13 AC CHARACTERISTICS …………………………...………………...……………………17 PIN ASSIGNMENTS ………………………………………………………………………19 MECHANICAL DIMENSIONS ………………...……………...…………………………..20 APPLICATIONS……………..……………………………………………………….……..
PAGE 3
DS3150 1. FUNCTIONAL DESCRIPTION The DS3150 performs all the functions necessary for interfacing at the physical layer to T3, E3, and STS1 lines. The device has independent receive and transmit paths (Figure 1A). The receiver performs clock and data recovery from a B3ZS-code or HDB3-code AMI signal and monitors for loss of the incoming signal. The recovered data optionally can be B3ZS/HDB3 decoded and output in NRZ format.
PAGE 4
DS3150 Table 1A. APPLICABLE STANDARDS T1.102-1993 T1.107-1995 T1.231-1997 T1.231-1993 T1.404-1994 GR-499-CORE GR-253-CORE G.703, 1991 G.751, 1993 G.823, 1993 G.775, 1994 O.
PAGE 5
DS3150 Table 1B. DS3150 T3/E3/STS-1 LIU TRANSFORMER RECOMMENDATIONS MANUFACTURER Pulse Engineering Pulse Engineering Halo Electronics Halo Electronics PART NO. PE65968 PE65969 TG070206NS TD070206NE OCL TURNS RATIO PKG/ SCHEMATIC DESCRIPTION PRIMARY LL µH BANDWIDTH 75Ω Ω (MHz) 1:2CT LS-1/C 6-pin SMT 19 0.06 0.250 to 500 1:2CT LC-1/C 6-pin thru-hole 19 0.06 0.250 to 500 1:2CT SMD/B 6-pin SMT 19 0.06 0.250 to 500 1:2CT DIP/B 6-pin DIP 19 0.06 0.
PAGE 6
DS3150 Figure 1C. RECEIVER JITTER TOLERANCE Jitter Tolerance (Ulpp) 10 T3 [GR-499 (1995)] Category II 10 5 T3 [GR-499 (1995)] Category I E3 [G.823(1993)] DS3150 Jitter Tolerance 1.5 1.0 0.3 0.15 0.1 0.1 669 10 100 2.3k 1k Frequency (Hz) 6 of 22 22.
PAGE 7
DS3150 TRANSMITTER Through the ZCSE* input, the device is configured to accept either bipolar data or NRZ data to be input to the transmitter. When the ZCSE* input is tied high, bipolar data must be applied at the TPOS and TNEG inputs. In this mode, the device will not perform B3ZS/HDB3-encoding on the outgoing data stream. When the ZCSE* input is tied low, an NRZ data stream must be applied at the TPOS input (TNEG is ignored).
PAGE 8
DS3150 Table 1D. T3 TRANSMIT WAVEFORM TEST PARAMETERS AND LIMITS PARAMETER Rate Line Code Transmission Medium Test Measurement Point Test Termination Pulse Amplitude Pulse Shape Unframed All Ones Power Level at 22.368MHz Unframed All Ones Power Level at 44.736MHz Pulse Imbalance of Isolated Pulses SPECIFICATION 44.736Mbps (±20ppm) B3ZS Coax cable (AT&T 734A or equivalent) At the end of 0ft to 450ft of coax cable 75Ω (± 1%) resistive Between 0.36V and 0.
PAGE 9
DS3150 Figure 1D. E3 TRANSMIT WAVEFORM TEMPLATE 1.2 1.1 17ns 1.0 0.9 Output Level (V) 0.8 8.65ns 0.7 G.703 E3 Template 0.6 0.5 0.4 12.1ns 0.3 0.2 0.1 24.5ns 0 -0.1 29.1ns -0.2 Time (ns) Table 1G.
PAGE 10
DS3150 Figure 1E.
PAGE 11
DS3150 DIAGNOSTICS The DS3150 contains an onboard Pseudo Random Binary Sequence (PRBS) generator and detector. This function is useful in testing the device at the physical layer. It will generate and detect either a 215 - 1 (T3 or STS-1) or 223 - 1 PRBS according to the ITU O.151 specification. The PRBS pattern generated and detected by the DS3150 is unframed. In other words, no T3, E3, or STS-1 framing patterns are inserted in the transmit data stream nor expected in the received data stream.
PAGE 12
DS3150 JITTER ATTENUATOR The DS3150 contains an onboard jitter attenuator that can be placed in either the receive path or the transmit path or disabled. This selection is made through the RMON and TTS* input signals. See Table 1H for selection details. Figure 1H shows the minimum jitter attenuation for the device when the jitter attenuator is enabled. Figure 1H also shows the receive jitter transfer when the jitter attenuator is disabled.
PAGE 13
DS3150 2. SIGNAL DESCRIPTIONS Table 2A below lists all signals on the DS3150 and their function. The signals are listed in alphabetical order. Section 4 shows the signal pin assignments for each package option. Table 2A. SIGNAL DESCRIPTIONS SIGNAL NAME I/O DESCRIPTION DM* O EFE I3 ICE I3 LBKS* I3 LBO I LOS* O MCLK I Driver Monitor (Active Low, Open Drain). This signal reports the status of the transmit driver monitor.
PAGE 14
DS3150 Table 2A. SIGNAL DESCRIPTIONS (continued) SIGNAL NAME I/O DESCRIPTION PRBS O3 RCLK O RMON I3 RNEG/ RLCV O RPOS/ RNRZ O Rx+ RxTCLK I TDS0 I PRBS Detector. This signal reports the status of the PRBS Detector. The PRBS detector will constantly search for either a 215 - 1 (T3 or STS-1) or 223 - 1 (E3) psuedo random bit sequence. This signal will remain high when the PRBS detector is out of synchronization.
PAGE 15
DS3150 Table 2A. SIGNAL DESCRIPTIONS (continued) SIGNAL NAME I/O DESCRIPTION TDS1/ OFSEL I TESS I3 TNEG I TPOS/ TNRZ I TTS* I3 Tx+ Tx- O3 Transmit Data Select Bit 1/Oscillator Frequency Select. If EFE = 1, this pin (TDS1) and signals TDS0 and TESS select the source of the transmit data (Table 2B). If MCLK is tied low, TDS1 is internally pulled low and a resistor connected between this pin (OFSEL) and ground determines the frequency of an internal oscillator.
PAGE 16
DS3150 Table 2B. TRANSMIT DATA MODE SELECT PIN DESCRIPTIONS TDS1 0 0 1 1 1 1 TDS0 0 1 0 0 1 1 TESS X X 0 or Float 1 0 1 or Float TRANSMIT MODE SELECTED Transmit data normally as input at TPOS and TNEG Transmit Unframed All Ones Transmit an Unframed 101010… pattern Transmit T3 AIS as per ANSI T1.107 (Figure 1E) Transmit a 223 - 1 PRBS pattern as per ITU O.151 Transmit a 215 - 1 PRBS pattern as per ITU O.
PAGE 17
DS3150 3. AC CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS* Voltage Range on Any Lead with Respect to VSS (except VDD) Supply Voltage Range (VDD) with Respect to VSS Operating Temperature Range Storage Temperature Range Soldering Temperature Range -0.3V to 5.5V -0.3V to 3.
PAGE 18
DS3150 (-40°C to +85°C; VDD = 3.3V ±5%) AC CHARACTERISTICS–DIGITAL PARAMETER RCLK/TCLK Clock Period RCLK Clock High/Low Time TCLK Clock High / Low Time TPOS/TNRZ, TNEG to TCLK Setup Time TPOS/TNRZ, TNEG Hold Time RCLK to RPOS/RNRZ Valid, RNEG/RLCV Valid, Signal Change on PRBS SYMBOL t1 t1 t1 t2 / t3 t2 / t3 t2 / t3 t2 / t3 t4 MIN t5 t6 2 2 TYP 22.4 29.1 19.3 11.2 14.5 9.6 9.0 11.6 7.7 7 2 MAX UNITS ns ns ns ns ns ns ns ns 13.4 17.4 11.5 ns ns 6 NOTES 1 2 3 1 2 3 4, 5 NOTES: 1) T3 Mode.
PAGE 19
DS3150 4. PIN ASSIGNMENTS VDD 28 27 26 LOS* LBKS* 25 RPOS/RNRZ 24 RNEG/RLCV 23 RCLK 22 VSS 9 21 RMON ICE 10 20 ZCSE* Tx- 11 19 MCLK DS3150 TTS* 12 13 14 15 16 17 18 VDD Tx+ 1 TCLK 8 Rx+ VSS 2 TNEG 7 EFE VDD 3 TPOS/TNRZ 6 Rx- VSS 4 TESS 5 LBO TDS1/OFSEL TDS0 Figure 4A. 28-PIN PLCC PIN ASSIGNMENT 48 47 46 45 44 43 42 41 40 39 38 37 VSS VSS TDS0 VSS Rx– EFE Rx+ VSS LBKS* LOS* VDD VDD Figure 4B.
PAGE 20
DS3150 5. MECHANICAL DIMENSIONS Figure 5A.
PAGE 21
DS3150 Figure 5B. 48-PIN TQFP PACKAGE DIM A A1 A2 D D1 E E1 L E B C MIN MAX 1.20 0.05 0.15 0.95 1.05 8.80 9.20 7.00 BSC 8.80 9.20 7.00 BSC 0.45 0.75 0.50 BSC 0.17 0.27 0.09 0.20 NOTES: 1) Dimensions d1 and e1 include mold mismatch but do not include mold protrusion; allowable protrusion is 0.25mm per side. 2) Details of pin 1 identifier are optional but must be located within the zone indicated. 3) Allowable dambar protrusion is 0.08mm total in excess of the b dimension; at maximum material condition.
PAGE 22
DS3150 6. APPLICATIONS Figure 6A. CHANNELIZED T3/E3 APPLICATION 8.192MHz I/F PCI Bus Bipolar I/F 16 Channel T1/E1 Framer DS3134 CHATEAU 256 Channel HDLC Controller DS21FF42/ DS21FF44 DS3112 TEMPE T1/E1 Datastreams 8.192MHz I/F DS21FT42 12 Channel T1 Framer DS3150 T3/E3 Line Interface Unit T3/E3 Framer and M13/ E13/ G.747 Mux Figure 6B. DUAL UNCHANNELIZED T3/E3 APPLICATION 44.2Mbps (T3) or 34Mbps (E3) Datastream PCI Bus DS3134 CHATEAU 256 Channel HDLC Controller 44.