Manual

Timing Diagrams
READ
EWEN/EWDS
WRITE
ERASE
HT93LC66
Rev. 1.20 5 October 29, 2001
CS
SK
Standby
DI
0
(1 )
0
Start bit
11=E W EN
00=E W D S
CS
SK
DO
H igh-Z H igh Z
0
DI
Start bit
1 (1 )
t
HZ
t
CDS
*
* Address pointer autom atically cycles to the next w ord
0
AN
A0
D0
DX
DX
M ode
AN
DX
(X 16)
A7
D15
(X 8 )
A8
D7
CS
SK
DO
H igh-Z
Standby
DI
1
(1 )
t
HZ
t
SV
t
PR
t
CDS
busy
ready
verify
0
Start bit
AN
AN-1
AN-2
A1
D0
A0 DX
CS
SK
DO
H igh-Z
Standby
DI
1
(1 )
t
HZ
t
SV
t
PR
t
CDS
busy
ready
verify
1
Start bit
AN
AN-1
AN-2
A1
A0