User Manual

I5216 SERIES
Advanced Information
PRELIMINARY
Publication Release Date: November 30, 2001
-14 Revision A1
INTERNAL REGISTERS
The following tables provide a general illustration of the bits. There are three configuration registers:
CFG0, CFG1 and CFG2. Thus, there are six 8-bit bytes to be loaded during the set-up of the device.
CFG0
Bit no. Signal Description
D0 (LSB) VLPD Power down the Volume Control.
D1 OPA0 Power down Speaker driver and/or Auxiliary output.
D2 OPA1 Power down Speaker driver and/or Auxiliary output.
D3 OPS0 Select speaker output multiplexer.
D4 OPS1 Select speaker output multiplexer.
D5 CDI0 Analog to digital converter input selector.
D6 CDI1 Analog to digital converter input selector.
D7 AMT0 Compress the filter signal.
D8 OSPD Power down the internal ChipCorder oscillator.
D9 INS0 Select Microphone input or Auxiliary input.
D10 AXPD Power down Auxiliary input amplifier.
D11 AXG0 Auxiliary input amplifier gain setting.
D12 AXG1 Auxiliary input amplifier gain setting.
D13 CIG0 Input gain setting for the Analog to digital converter.
D14 CIG1 Input gain setting for the Analog to digital converter.
D15 (MSB) CIG2 Input gain setting for the Analog to digital converter.