User Manual
I5216 SERIES
Advanced Information
PRELIMINARY
Publication Release Date: November 30, 2001
- 36 Revision A1
I5216 ANALOG STRUCTURE (Right Half) DESCRIPTION
S2M1 S2M0 SOURCE
0 0 BOTH
0 1 AUX IN ONLY
1 0 FILTO ONLY
1 1 Power Down
FLD1 FLD0 SAMPLE
RATE
FILTER
PASS BAND
0 0 8 KHz 3.7 KHz
0 1 6.4 KHz 2.9 KHz
1 0 5.3 KHz 2.5 KHz
1 1 4.0 KHz 1.8 KHz
OSPD Condition CKD2 Condition CKDV Condition
0 Power Up Internal
Oscillator
0 Divide Master Clock
frequency by 1
0 Divide Master Clock
frequency by 1728
1 Power Down
Internal Oscillator
1 Divide Master Clock
frequency by 2
1 Divide Master Clock
frequency by 2560
CIG2 CIG1 CIG0 AXG1 AXG0 AXPD INS0 OSPD AMT0 CDI1 CDI0 OPS1 OPS0 OPA1 OPA0 VLPD
CFG0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
VLS1 VLS0 VOL2 VOL1 VOL0 S1S1 S1S0 S1M1 S1M0 S2M1 S2M0 FLS0 FLD1 FLD0 FLPD AGPD
CFG1
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
X X X CKD2 COG2 COG1 COG0 CKDV MUTE HPF0 HSR0 I2S0 LAW1 LAW0 DAPD ADPD
CFG2
FLS0 SOURCE AMT0 Signal Output
0 SUM1 0 Uncompressed
1 ARRAY 1 Compressed
FLPD CONDITION
0 Power Up
1 Power Down










