Owner manual

Functional Description (Continued)
By default Temperature Register data is represented by a
9-bit two’s complement digital word with the LSB having a
resolution of 0.5˚C:
Temperature Digital Output
Binary Hex
+125˚C 0 1111 1010 0 FAh
+25˚C 0 0011 0010 0 32h
+1.5˚C 0 0000 0011 0 03h
+0˚C 0 0000 0000 0 00h
−0.5˚C 1 1111 1111 1 FFh
−25˚C 1 1100 1110 1 CEh
−55˚C 1 1001 0010 1 92h
Temperature Register data can also be represented by a
12-bit two’s complement digital word with a LSB of 0.0625˚C:
Temperature Digital Output
Binary Hex
+125˚C 0111 1100 0000 7 D0h
+25˚C 0001 1001 0000 1 90h
+1.0˚C 0000 0001 0000 0 10h
+0.0625˚C 0000 0000 0001 0 01h
0˚C 0000 0000 0000 00h
−0.0625˚C 1111 1111 1111 F FFh
−1.0˚C 1111 1111 0000 F F0h
−25˚C 1110 0111 0000 E 70h
−55˚C 1100 1001 0000 C 90h
The 8 MSBs of the Temperature reading can be found at
Value RAM address 28 h. The remainder of the Temperature
reading can be found in the OS Configuration/Temperature
Resolution Register bits 7-4. In 9-bit format bit 7 is the only
valid bit.
7.2 Temperature Interrupts
There are four Value RAM WATCHDOG limits for the Tem-
perature reading that affect the INT and OS outputs of the
LM80. They are: Hot Temperature Limit, Hot Temperature
Hysteresis Limit, OS Limit, OS Hysteresis Limit. There are
three interrupt modes of operation: “One-Time Interrupt”
mode, “Default Interrupt” mode, and “Comparator Mode”.
The OS output of the LM80 can be programmed for
“One-Time Interrupt” mode and “Comparator” mode. INT can
be programmed for “Default Interrupt” mode and “One-Time”
Interrupt.
“Default Interrupt mode” operates in the following way:
Exceeding T
hot
causes an Interrupt that will remain active
indefinitely until reset by reading Interrupt Status Register 1
or cleared by the INT_Clear bit in the Configuration register.
Once an Interrupt event has occurred by crossing T
hot
, then
reset, an Interrupt will occur again once the next temperature
conversion has completed. The interrupts will continue to
occur in this manner until the temperature goes below T
hot
hyst
, at which time the Interrupt output will automatically
clear.
“One-Time Interrupt” mode operates in the following way:
Exceeding T
hot
causes an Interrupt that will remain active
indefinitely until reset by reading Interrupt Status Register 1
or cleared by the INT_Clear bit in the Configuration register.
Once an Interrupt event has occurred by crossing T
hot
, then
reset, an Interrupt will not occur again until the temperature
goes below T
hot hyst
.
“Comparator” mode operates in the following way: Ex-
ceeding T
os
causes the OS output to go Low (default). OS
will remain Low until the temperature goes below T
os
. Once
the temperature goes below T
os
, OS will go High.
LM80
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