Instruction Manual

MAX11644/MAX11645

Low-Power, 1-/2-Channel, I

C, 12-Bit ADCs

in Ultra-Tiny 1.9mm x 2.2mm Package

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BIT 7

(MSB)

BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1

BIT 0

(LSB)

REG SCAN1 SCAN0 X X X CS0 SGL/DIF

BIT NAME DESCRIPTION

7 REG Register bit. 1 = setup byte (see Table 1), 0 = configuration byte.

6 SCAN1

5 SCAN0

Scan select bits. Two bits select the scanning configuration (Table 5). Default to 00 at power-up.

1 CS0

Channel select bit. CS0 selects which analog input channels are to be used for conversion

(Tables 3 and 4). Default to 0000 at power-up.

0 SGL/DIF

1 = single-ended, 0 = differential (Tables 3 and 4). Defaults to 1 at power-up. See the Single-

Ended/Differential Input section.

Table 2. Configuration Byte Format

CS0 AIN0 AIN1 GND

0+ -

1+-

X = Don’t care.

Table 3. Channel Selection in Single-Ended Mode (SGL/DIF = 1)

CS0 AIN0 AIN1

0+ -

1-+

Table 4. Channel Selection in Differential Mode (SGL/DIF = 0)