User Manual

MAX13171E/MAX13173E/MAX13175E
Multiprotocol, Pin-Selectable
Data Interface Chipset
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MAX13173E Pin Description
PIN NAME FUNCTION
1 T1IN Transmitter 1 Logic Input
2V
CC
Device Supply Voltage. Bypass V
CC
with a 4.7µF capacitor to ground as close as possible to
the device.
3 T2IN Transmitter 2 Logic Input
4 T3IN Transmitter 3 Logic Input
5V
L
Logic-Supply Reference Input. V
L
determines the voltage level of the logic interface. Bypass V
L
with a 0.1µF capacitor to ground, as close as possible to the device.
6 R1OUT Receiver 1 Logic Output with Internal Pullup to V
L
7 R2OUT Receiver 2 Logic Output with Internal Pullup to V
L
8 R3OUT Receiver 3 Logic Output with Internal Pullup to V
L
9 R5OUT/T5IN Receiver 5 Logic Output/Transmitter 5 Logic Input
10 T4IN Transmitter 4 Logic Input
11 R4OUT Receiver 4 Logic Output
12 M0 Mode-Select 0 Input with Internal Pullup to V
L
13 M1 Mode-Select 1 Input with Internal Pullup to V
L
14 M2 Mode-Select 2 Input with Internal Pullup to V
L
15 DCE/DTE DCE/DTE Mode-Select Input with Internal Pullup to V
L
16 INVERT
T4/R4 and T5/R5 S el ect Inp ut w i th Inter nal P ul l up to V
L
. IN V E RT r ever ses the acti on of DCE/DTE
for channels 4 and 5.
17 T4OUTA/R4INA Transmitter 4 Inverting Output/Receiver 4 Inverting Input
18, 25, 31, 35 GND Ground
19 R3INB Receiver 3 Noninverting Input
20 R3INA Receiver 3 Inverting Input
21 R2INB Receiver 2 Noninverting Input
22 R2INA Receiver 2 Inverting Input
23 T3OUTB/R1INB Transmitter 3 Noninverting Output/Receiver 1 Noninverting Input
24 T3OUTA/R1INA Transmitter 3 Inverting Output/Receiver 1 Inverting Input
26 T2OUTB Transmitter 2 Noninverting Output
27 T2OUTA Transmitter 2 Inverting Output
28 T1OUTB Transmitter 1 Noninverting Output
29 T1OUTA Transmitter 1 Inverting Output
30 T5OUTA/R5INA Transmitter 5 Inverting Output/Receiver 5 Inverting Input
32 V
EE
Charge-Pump Negative-Supply Output. Connect a 4.7µF ceramic capacitor from V
EE
to ground
as close as possible to the device.
33 C2-
V
EE
Charge-Pump Flying-Capacitor Negative Terminal. Connect a 1µF ceramic capacitor
between C2+ and C2-.
34 C2+
V
EE
Charge-Pump Flying-Capacitor Positive Terminal. Connect a 1µF ceramic capacitor
between C2+ and C2-.
36 C1-
V
DD
Charge-Pump Flying-Capacitor Negative Terminal. Connect a 1µF ceramic capacitor
between C1+ and C1-.