9-2861; Rev 0; 10/03 KIT ATION EVALU E L B A IL AVA Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator Features ♦ Inductor-Saturation Protection ♦ Accurate Differential Current-Sense Inputs ♦ Dual Ultra-High-Efficiency Quick-PWMs with 100ns Load-Step Response ♦ MAX1540 1.8V/1.2V Fixed or 0.7V to 5.5V Adjustable Output (OUT1) 2.5V/1.5V Fixed or 0.7V to 5.
MAX1540/MAX1541 Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator ABSOLUTE MAXIMUM RATINGS V+, LDOON to GND ...............................................-0.3V to +28V LDOOUT to GND (MAX1540, Note 1) ......................-0.3V to +6V LDOOUT to GND (MAX1541, Note 1) ....................-0.3V to +28V VDD to GND (MAX1541, Note 1) ..............................-0.3V to +6V VCC, ON_ to GND.....................................................-0.
Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator (V+ = 15V, VCC = VDD = ON1 = ON2 = 5V, SKIP = GND, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.
MAX1540/MAX1541 Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator ELECTRICAL CHARACTERISTICS (continued) (V+ = 15V, VCC = VDD = ON1 = ON2 = 5V, SKIP = GND, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.
Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator (V+ = 15V, VCC = VDD = ON1 = ON2 = 5V, SKIP = GND, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX TA = +25°C to +85°C 1.986 2.00 2.014 TA = 0°C to +85°C 1.983 2.00 2.017 UNITS REFERENCE (REF) Reference Voltage VREF Reference Load Regulation REF Lockout Voltage ∆VREF VCC = 4.5V to 5.5V, IREF = 0V IREF = -10µA to +50µA -0.
MAX1540/MAX1541 Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator ELECTRICAL CHARACTERISTICS (continued) (V+ = 15V, VCC = VDD = ON1 = ON2 = 5V, SKIP = GND, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.
Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator (V+ = 15V, VCC = VDD = ON1 = ON2 = 5V, SKIP = GND, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS TON, OVP/UVP, LSAT, SKIP, FBLANK Four-Level Input Logic Levels MIN TYP UNITS V High Open 3.15 3.85 REF 1.65 2.35 Low TON, OVP/UVP, LSAT, SKIP, FBLANK forced to GND or VCC Four-Level Logic Input Current MAX VCC 0.4V 0.
MAX1540/MAX1541 Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator ELECTRICAL CHARACTERISTICS (continued) (V+ = 15V, VCC = VDD = ON1 = ON2 = 5V, SKIP = GND, TA = -40°C to +85°C, unless otherwise noted.
Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator (V+ = 15V, VCC = VDD = ON1 = ON2 = 5V, SKIP = GND, TA = -40°C to +85°C, unless otherwise noted.) (Note 4) PARAMETER MAX1541 LDO Output-Voltage Accuracy (Fixed VLDOOUT) MAX1541 LDO Feedback Accuracy (Adjustable VLDOOUT) SYMBOL VLDOOUT VFBLDO Dropout Voltage CONDITIONS FBLDO = ON1 = ON2 = GND, VLDOIN = 6V to 28V FBLDO = LDOOUT, ON1 = ON2 = GND, VLDOIN = 4.5V to 28V MIN MAX 0 < ILDOOUT < 10mA 4.85 5.
ELECTRICAL CHARACTERISTICS (continued) (V+ = 15V, VCC = VDD = ON1 = ON2 = 5V, SKIP = GND, TA = -40°C to +85°C, unless otherwise noted.) (Note 4) PARAMETER SYMBOL CONDITIONS TON, OVP/UVP, LSAT, SKIP, FBLANK Four-Level Input Logic Levels MIN MAX UNITS V High VCC 0.4V Open 3.15 3.85 REF 1.65 2.35 Low 0.
Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator 1.01 1.00 0.99 500 400 300 200 100 0.98 600 1 2 3 5 4 500 400 300 200 100 SKIP = GND SKIP = VCC SKIP = GND SKIP = VCC 0 0 0 1 2 3 5 MAXIMUM OUTPUT CURRENT vs. INPUT VOLTAGE NO-LOAD SUPPLY CURRENT vs. INPUT VOLTAGE (FORCED-PWM OPERATION) 5.4 5.2 5.0 4.8 4.6 MAX1540 toc09 16 IBIAS 12 IIN 8 4 4.4 4.2 SKIP = ON1 = ON2 = VCC 0 4.
Typical Operating Characteristics (continued) (MAX1541 Circuit of Figure 12, VIN = 12V, VDD = VCC = 5V, SKIP = GND, TON = REF, TA = +25°C, unless otherwise noted.) LINEAR-REGULATOR OUTPUT (LDOOUT) vs. LOAD CURRENT STARTUP WAVEFORM (HEAVY LOAD) MAX1540 toc14 MAX1540 toc13 3.36 3.34 LDO OUTPUT VOLTAGE (V) MAX1540/MAX1541 Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator 3.32 3.3V A 0 4A 3.30 B 2A VLDOIN = 5V 3.28 0 3.26 2.5V VLDOIN = 12V C 3.
Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator SHUTDOWN WAVEFORM (DISCHARGE MODE ENABLED) 2.5V OUTPUT LOAD TRANSIENT (FORCED PWM) MAX1540 toc17 3.3V MAX1540 toc18 A 4A B 0 2.6V 0 2.5V 0 A 2.5V C 0 5V D 0 B 2.4V 4A C 0 12V 5V D E 0 0 1ms/div A. ON2, 5V/div B. OUT2, 2V/div C. INDUCTOR CURRENT, 2A/div 40µs/div D. DL2, 5V/div E. PGOOD2, 5V/div A. IOUT2 = 0 TO 4A, 5A/div B. VOUT2 = 2.5V, 100mV/div C. INDUCTOR CURRENT, 5A/div D.
MAX1540/MAX1541 Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator Typical Operating Characteristics (continued) (MAX1541 Circuit of Figure 12, VIN = 12V, VDD = VCC = 5V, SKIP = GND, TON = REF, TA = +25°C, unless otherwise noted.) OUTPUT OVERLOAD (UVP DISABLED) LINEAR-REGULATOR LINE TRANSIENT MAX1540 toc21 20V MAX1540 toc22 20A A 10A A 0 10V 20V B 5A 0 B 10V 2.5V 3.8V C C 3.3V 0 5V 2.8V D 0 40µs/div 200µs/div A. INPUT (VIN), 10V/div B.
Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator INDUCTOR-SATURATION PROTECTION (∆VILIM = 200mV) INDUCTOR-SATURATION PROTECTION (∆VILIM = 400mV) MAX1540 toc25 5A MAX1540 toc26 A 0 5A A 0 2.5V 0.67V B 2.5V B C 1.5V 5V C 0.67V 0.47V 7.5A D D 0.27V 5A E 0 0 20µs/div A. IOUT2 = 0 TO 5A, 5A/div B. 2.5V OUTPUT, 200mV/div 20µs/div C. ILIM, 200mV/div D. INDUCTOR CURRENT, 5A/div A. IOUT2 = 0 TO 5A, 5A/div B. 2.5V OUTPUT, 1V/div C.
Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator MAX1540/MAX1541 Pin Description PIN MAX1540 1 2 16 MAX1541 1 2 NAME FUNCTION OVP/UVP Overvoltage/Undervoltage Protection and Discharge-Mode Control Input. This fourlevel logic input selects between various output fault-protection options (Table 7) by selectively enabling OVP protection and UVP protection.
Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator PIN MAX1540 6 7 MAX1541 8 9 NAME ILIM1 Valley Current-Limit Threshold Adjustment for Controller 1. The valley current-limit threshold defaults to 50mV if ILIM1 is tied to VCC. In adjustable mode, the valley current-limit threshold across CSP1 and CSN1 is precisely 1/10 the voltage seen at ILIM1 over a 250mV to 2.5V range. The logic threshold for switchover to the 50mV default value is approximately VCC - 1V.
Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator MAX1540/MAX1541 Pin Description (continued) PIN MAX1540 18 MAX1541 NAME FUNCTION Open-Drain Power-Good Output. PGOOD2 is low when the output voltage is more than 10% (typ) above or below the normal regulation point, during soft-start, and in shutdown. After the soft-start circuit has terminated, PGOOD2 becomes high impedance if the output is in regulation.
Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator PIN NAME FUNCTION MAX1540 MAX1541 24 31 LX1 Inductor Connection for Controller 1. Connect to the switched side of the inductor. LX1 serves as the lower supply rail for the DH1 high-side gate driver. 25 32 DH1 High-Side Gate-Driver Output for Controller 1. DH1 swings from LX1 to BST1. 26 27 28 29 30 — 33 34 35 36 37 38 PGOOD1 Open-Drain Power-Good Output.
Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator MAX1540/MAX1541 Pin Description (continued) PIN MAX1540 MAX1541 31 32 39 40 NAME FUNCTION ON2 OUT2 Enable Input. Pull ON2 to GND to shut down controller 2 (OUT2). Connect to VCC for normal operation. When discharge mode is enabled by OVP/UVP, the output is discharged through a 10Ω resistor between OUT2 and GND, and DL2 is forced high after VOUT2 drops below 0.3V.
Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator INPUT (VIN)* 7V TO 20V CIN (2) 10µF C1 22µF LDOOUT DBST NH1 V+ DBST MAX1540 DH1 DH2 BST1 BST2 CBST1 0.1µF NL1 DL1 L1 2.5µH MAX1540/MAX1541 +5V BIAS SUPPLY NH2 CBST2 0.1µF LX1 LX2 DL1 DL2 NL2 DL2 GND CSP1 L2 2.2µH CSP2 RCS2 5mΩ RCS1 15mΩ OUTPUT 1 1.8V, 4A (MAX) COUT1 220µF CSN1 CSN2 OUT1 OUT2 FB1 SKIP REF CREF (485kHz/355kHz) 0.
MAX1540/MAX1541 Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator Table 2. Component Suppliers SUPPLIER PHONE Central Semiconductor 631-435-1110 (USA) www.centralsemi.com Coilcraft 800-322-2645 (USA) www.coilcraft.com Fairchild Semiconductor 888-522-5372 (USA) www.fairchildsemi.com International Rectifier 310-322-3331 (USA) www.irf.com Kemet 408-986-0424 (USA) www.kemet.com Panasonic 65-6231-3226 (Singapore), 408-749-9714 (USA) WEBSITE www.
Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator IBIAS = ICC + fSW (QG(LOW) + QG(HIGH)) = 4mA to 50mA (typ) where ICC is 1.1mA (typ), fSW is the switching frequency, and Q G(LOW) and Q G(HIGH) are the MOSFET data sheet’s total gate-charge specification limits at VGS = 5V. The V+ battery input and 5V bias inputs (VCC and VDD) can be connected together if the input source is a fixed 4.5V to 5.5V supply.
MAX1540/MAX1541 Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator *V+ MAX1540/MAX1541 TON LSAT SKIP ILIM2 ILIM1 CURRENT LIMIT 1 (FIGURE 5) CSP1 CURRENT LIMIT 2 (FIGURE 5) CSP2 CSN2 CSN1 VALLEY CURRENT LIMIT ZERO SATURATION CROSSING LIMIT SATURATION LIMIT VALLEY CURRENT LIMIT ZERO CROSSING BST1 BST2 DH1 DH2 LX1 PWM CONTROLLER 1 (FIGURE 3) *VDD FAULT1 DL1 GND INT FB1 INT REF1 LX2 PWM CONTROLLER 2 (FIGURE 3) *VDD FAULT2 DL2 INT FB2 GND
Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator CONTROLLER 1 (OUT1) NOMINAL TON SETTING (kHz) K-FACTOR ERROR (%) TYPICAL K-FACTOR (µs) CONTROLLER 2 (OUT2) MINIMUM VIN AT VOUT1 = 1.8V* (V) TYPICAL K-FACTOR (µs) MINIMUM VIN AT VOUT2 = 2.5V* (V) 200kHz (TON = VCC) ±10 4.5 (235kHz) 2.28 6.2 (170kHz) 2.96 300kHz (TON = open) ±10 3.0 (345kHz) 2.52 4.1 (255kHz) 3.18 420kHz (TON = REF) ±12.5 2.2 (485kHz) 2.91 3.0 (355kHz) 3.
MAX1540/MAX1541 Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator *MAIN MAX1541 CONTROLLER (OUT1) ONLY SLOPE COMP CC1CC1 R ERROR AMP INT FB_ tOFF(MIN) 7R A Gm = 80 V INT REF_ Q TRIG 1-SHOT S VALLEY CURRENT LIMIT Q DH DRIVER R tON SATURATION LIMIT TRIG Q 1-SHOT DL DRIVER S Q V+ ON-TIME COMPUTE TON FAULT PROTECTION R OUT_ ZERO CROSSING Figure 3.
Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator MAX1540/MAX1541 QUAD-LEVEL DECODE LSAT SATURATION LIMIT VCC - 1.0V ILIM_ 9R DH DRIVER R 6µA 0.5V S VALLEY CURRENT LIMIT Q R CSP_ ZERO CROSSING CSN_ SKIP Figure 5. MAX1540/MAX1541 Current-Limit Functional Diagram IPEAK ILOAD INDUCTOR CURRENT (Figures 3 and 5). The actual peak current is greater than the valley current-limit threshold by an amount equal to the inductor ripple current.
MAX1540/MAX1541 Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator Inductor-Saturation Limit The LSAT connection selects an upper current-sense limit as the inductor-saturation threshold, or disables the inductor-saturation protection feature altogether (LSAT = GND). When enabled, the inductor-saturation threshold is a multiple of the positive valley current-limit threshold (Table 5) and tracks the valley current limit when ILIM is adjusted.
Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator The internal pulldown transistor that drives DL_ low is robust, with a 0.6Ω (typ) on-resistance. This helps prevent DL_ from being pulled up due to capacitive coupling from the drain to the gate of the low-side MOSFETs when the inductor node (LX_) quickly switches from ground to VIN.
MAX1540/MAX1541 Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator Table 6. FBLANK Configuration Table POWER-GOOD 0.9 x INT REF_ 1.1 x INT REF_ FAULT PROTECTION 0.7 x INT REF_ 1.
Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator Undervoltage Protection (UVP) When the output voltage drops below 70% of the nominal regulation voltage and UVP is enabled (OVP/UVP = VCC or REF), the controller sets the fault latch and activates the output discharge sequence (see the Shutdown and Output Discharge section) of both outputs. When the output voltage drops to 0.
MAX1540/MAX1541 Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator TO ERROR AMPLIFIER MAX1540 MAX1541 OUT_ FIXED OUTPUT FB = VCC FB_ FIXED OUTPUT FB = GND REF (2.0V) 9R R Figure 10. MAX1540/MAX1541 Dual Mode Feedback Decoder Table 8. Output Voltage Configuration OUT1 OUT2 MAX1540 MAX1541 MAX1540 MAX1541 FB_ = VCC Fixed 1.2V Not allowed Fixed 1.5V Fixed 1.8V FB_ = GND Fixed 1.8V Not allowed Fixed 2.5V Fixed 2.5V FB_ = OUT_ or adjustable 0.
Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator RSENSE MAX1540 MAX1541 COUT DL_ NL GND and the time constant for a negative REFIN1 voltage transition is: CSP_ CSN_ RC OUT_ R8 × R9 τNEG = C R8+R9 REFIN1 FB_ Linear Regulator (LDO) RD Figure 11. Setting VOUT with a Resistive Voltage-Divider at FB_ light loads, quickly discharging the output capacitors.
MAX1540/MAX1541 Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator +5V BIAS SUPPLY INPUT (VIN)* 7V TO 20V CIN (2) 4.7µF C1 1µF VDD DBST NH1 V+ DBST MAX1541 DH1 DH2 BST1 BST2 CBST1 0.1µF NL1 DL1 L1 1.8µH NH2 CBST 0.1µF LX1 LX2 DL1 DL2 SKIP GND CSP1 CSP2 NL2 DL2 RCS2 15mΩ RCS1 15mΩ OUTPUT 1 VOUT(HIGH) = 1.5V VOUT(LOW) = 1.0V VOUT(LOW) = VREF COUT1 470µF CSN1 CSN2 OUT1 OUT2 FB1 CCC1 47pF ((R8R9+ R9)) VOUT(HIGH) = VREF L2 4.
Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator MAX1540/MAX1541 INTERNAL LDOIN OPTION BETWEEN THE MAX1540/MAX1541 V+ *LDOIN LDOOUT VL REG AND REF LDOON INTERNAL VDD OPTION BETWEEN THE MAX1540/MAX1541 GATE DRIVER AND ERROR AMP *VDD FIXED 5V *FBDLO INTERNAL FBLDO OPTION BETWEEN THE MAX1540/MAX1541 0.2V *MAX1541 ONLY. Figure 13.
MAX1540/MAX1541 Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator Inductor Selection Setting the Current Limit The switching frequency and inductor operating point determine the inductor value as follows: The minimum current-limit threshold must be great enough to support the maximum load current when the current limit is at the minimum tolerance value.
Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator L = CEQ × REQ RL where RL is the inductor’s series DC resistance. In this configuration, the current-sense resistance is equivalent to the inductor’s DC resistance (RSENSE = RL). Use the worst-case inductance and RL values provided by the inductor manufacturer, adding some margin for the inductance drop over temperature and load.
MAX1540/MAX1541 Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator VIN DH CIN RSENSE L VOUT LX MAX1540 MAX1541 COUT DL GND CONNECT TO PREFERRED LSAT SETTING CSP LSAT CSN a) OUTPUT SERIES RESISTOR SENSING VIN CIN DH L VOUT LX MAX1540 MAX1541 COUT DL CSN RSENSE DISABLE LSAT CSP GND LSAT b) LOW-SIDE SERIES RESISTOR SENSING VIN DH CIN L VOUT LX COUT CSN MAX1540 MAX1541 DISABLE LSAT DL VIN CSP LSAT DH GND CIN INDUCTOR RL L VOUT LX c)
Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator Input-Capacitor Selection The input capacitor must meet the ripple current requirement (IRMS) imposed by the switching currents: f fESR ≤ SW π where fESR = 1 2πRESRCOUT For a typical 300kHz application, the ESR zero frequency must be well below 95kHz, preferably below 50kHz. Tantalum and OS-CON capacitors in widespread use at the time of publication have typical ESR zero frequencies of 25kHz.
MAX1540/MAX1541 Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator Power-MOSFET Dissipation Worst-case conduction losses occur at the duty factor extremes. For the high-side MOSFET (NH), the worstcase power dissipation due to resistance occurs at minimum input voltage: V PD (NH Resistance) = OUT (ILOAD )2 × RDS(ON) VIN Generally, use a small high-side MOSFET to reduce switching losses at high input voltages.
Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator VIN(MIN) = VOUT + VDROP1 h × t OFF(MIN) 1- K where V DROP1 is the parasitic voltage drop in the charge path (see the On-Time One-Shot section), tOFF(MIN) is from the Electrical Characteristics, and K is taken from Table 3. The absolute minimum input voltage is calculated with h = 1.
MAX1540/MAX1541 Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator VDDQ VCC VIN SKIP DH1 CIN L 10kΩ RSENSE V VTT = DDQ 2 LX1 REFIN1 10nF COUT DL1 MAX1541 GND 10kΩ CSP1 OD CSN1 GATE OUT1 FBLANK FB1 VDDQ = DDR MEMORY SUPPLY VOLTAGE VTT = TERMINATION SUPPLY VOLTAGE Figure 16. Active Bus Termination Voltage Positioning In applications where fast load transients occur, the output voltage changes instantly by ESRCOUT x ∆ILOAD.
Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator MAX1540/MAX1541 R1 +5V BIAS SUPPLY C2 VDD VCC DBST C1 V+ INPUT (VIN) CIN BST_ NH DH_ CBST MAX1540 MAX1541 L1 VOLTAGE-POSITIONED OUTPUT (VOUT(VPS)) RSENSE LX_ NL COUT DL DL_ GND CSP_ OUT_ FB CSN_ VOUT(VPS) = VOUT(NO LOAD) - RSENSEIOUT Figure 17. Voltage Positioning VOLTAGE POSITIONING THE OUTPUT CAPACITIVE SOAR (dV/dt = IOUT/COUT) ESR VOLTAGE STEP (ISTEP x RESR) A 1.4 VOUT 1.
MAX1540/MAX1541 Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator VIA TO POWER GROUND CONNECT GND AND PGND TO THE CONTROLLER AT ONE POINT ONLY AS SHOWN CONNECT THE EXPOSED PAD TO ANALOG GROUND VIA TO VCC BYPASS CAPACITOR VIA TO VCC PIN VIA TO REF PIN VIA TO REF BYPASS CAPACITOR MAX1540 TOP LAYER MAX1540 BOTTOM LAYER KELVIN-SENSE VIAS UNDER THE SENSE RESISTOR (REFER TO EVALUATION KIT) DUAL N-CHANNEL MOSFET INDUCTOR SINGLE N-CHANNEL MOSFETS INDUCTOR DH LX D
Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator OUT1 34 LX1 FB1 35 31 CSN1 36 PGOOD1 CSP1 37 DH1 FBLANK 38 32 ON2 39 33 ON1 40 TOP VIEW OVP/UVP 1 30 BST1 SKIP 2 29 LDOON LSAT 3 28 DL1 TON 4 27 FBLDO VCC 5 GATE MAX1541 26 LDOOUT 6 25 VDD 15 16 17 18 19 20 OUT2 PGOOD2 DH2 LX2 BST2 GND FB2 21 14 DL2 10 REF CSN2 22 13 9 CSP2 V+ ILIM2 12 LDOIN 23 11 24 8 OD 7 REFIN1 CC1 ILIM1 MAX1540/MAX1541
Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) D2 0.15 C A D b CL 0.10 M C A B D2/2 D/2 PIN # 1 I.D. QFN THIN.EPS MAX1540/MAX1541 Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator k 0.15 C B PIN # 1 I.D. 0.35x45 E/2 E2/2 CL (NE-1) X e E E2 k L DETAIL A e (ND-1) X e CL CL L L e e 0.10 C A C 0.
Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator COMMON DIMENSIONS EXPOSED PAD VARIATIONS NOTES: 1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994. 2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES. 3. N IS THE TOTAL NUMBER OF TERMINALS. 4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) QFN THIN 6x6x0.8.EPS MAX1540/MAX1541 Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator D2 D CL D/2 b D2/2 k E/2 E2/2 E (NE-1) X e CL E2 k e L (ND-1) X e CL CL L L e A1 A2 e A PACKAGE OUTLINE 36,40L QFN THIN, 6x6x0.
Dual Step-Down Controllers with Saturation Protection, Dynamic Output, and Linear Regulator COMMON DIMENSIONS EXPOSED PAD VARIATIONS D2 E2 PKG. CODES MIN. NOM. MAX. MIN. NOM. MAX. T3666-1 3.60 3.70 3.80 3.60 3.70 3.80 T4066-1 4.00 4.10 4.20 4.00 4.10 4.20 NOTES: 1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994. 2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES. 3. N IS THE TOTAL NUMBER OF TERMINALS. 4.
