Instruction Manual

MAX5042/MAX5043
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(V
POSINPWM
= 20V to 76V, V
REG15
= 18V, C
REG15
= 4.7µF, C
REG9
= 1µF, C
REG5
= 1µF, R
RCOSC
= 24kΩ, C
RCOSC
= 100pF, C
BST
=
0.22µF, R
DRVDEL
= 10kΩ, C
DRVDEL
= 0.22µF, V
CSS
= V
CSP
= V
CSN
= V
RAMP
= V
PWMNEG
= V
NEGIN
= 0, T
A
= -40°C to +125°C,
unless otherwise noted. Typical values are at V
POSINPWM
= 48V, T
A
= +25°C, unless otherwise noted. All voltages are referred to
PWMNEG, unless otherwise noted.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SYNC Leakage Current ±1 µA
SYNC Maximum Frequency f
SYNC
2.4 MHz
SYNC On-Time 50 ns
SYNC Off-Time 200 ns
PWM LOGIC
PWM Comparator Propagation
Delay
70 ns
PPWM to XFRMRL Delay PPWM rising 120 ns
DRVDEL Reference Voltage 1.14 1.38 V
PPWM Output High Sourcing 2mA 2.8 V
PPWM Output Low Sinking 2mA 0.4 V
PWMSD Logic High 3.5 V
PWMSD Logic Low 0.8 V
PWMSD Leakage Current ±1 µA
SOFT-START
Soft-Start Current I
CSS
33 µA
Minimum OPTO Voltage CSS = 0, sinking 2mA 1.4 V
RAMP GENERATOR
Minimum RCFF Voltage RCFF sinking 2mA 2.1 V
RCFF Leakage ±0.1 ±1 µA
OVERLOAD FAULT
FLTINT Pulse Current I
FLTINT
80 µA
FLTINT Trip Point 2.0 2.7 3.5 V
FLTINT Hysteresis 0.75 V
INTERNAL POWER FETs
On-Resistance R
DSON
V
D R V I N
= V
BS T
= 9V , V
X F RM RH
= V
S R C
= 0,
I
DS
= 190mA
75 200 mΩ
Off-State Leakage Current 10 µA
Total Gate Charge Per FET Inferred from supply current with V
D S
= 50V 45 nC
HIGH-SIDE DRIVER
Low-to-High Latency
Driver delay until FET V
GS
reaches 0.9 x
(V
BST
- V
XFRMRH
)
80 ns
High-to-Low Latency
Driver delay until FET V
GS
reaches 0.1 x
(V
BST
- V
XFRMRH
)
45 ns
Output Drive Voltage BST to XFRMRH with high side on 8 V
LOW-SIDE DRIVER
Low-to-High Latency
Driver delay until FET V
GS
reaches 0.9 x
V
DRVIN
80 ns